FPGA-Based MIPI Camera Development with XILINX MIPI D-PHY IP Core
XILINX’s ULTRASCALE+ series FPGA comes with two MIPI IP cores, namely the MIPI D-PHY IP and MIPI CSI-2 IP. The D-PHY can be considered a low-level IP core that can parse data from each LANE, with data between LANE being relatively independent, requiring the user to compose a complete frame of image data. The CSI-2 … Read more