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CPUs and GPUs both belong to the von Neumann architecture, which involves instruction decoding and execution, sharing memory.The reason FPGAs are faster than CPUs and GPUs is fundamentally due to their architecture, which is instruction-less and does not share memory.
In the von Neumann structure, since execution units can execute arbitrary instructions, there is a need for instruction memory, decoders, various instruction arithmetic units, and branch jump processing logic.Each logic unit’s function in an FPGA is determined during reprogramming, eliminating the need for instructions.
In the von Neumann structure, memory serves two purposes:1) To save state.2) To communicate between execution units.
1) Save state:The registers and on-chip memory (BRAM) in an FPGA belong to their respective control logic, eliminating unnecessary arbitration and caching.
2) Communication needs:The connections between each logic unit in an FPGA are determined during reprogramming, eliminating the need for communication through shared memory.
In compute-intensive tasks:
In data centers, the core advantage of FPGAs over GPUs is latency.Why is the latency of FPGAs much lower than that of GPUs?Essentially, it is due to architectural differences.FPGAs have both pipeline parallelism and data parallelism, whereas GPUs primarily have data parallelism (with limited pipeline depth).
Processing a data packet involves 10 steps; an FPGA can build a 10-stage pipeline where different stages handle different data packets, completing processing after 10 stages.Each completed data packet can be immediately output.In contrast, the GPU’s data parallel approach employs 10 computing units, each processing different data packets, but all units must operate in unison, performing the same task (SIMD).This requires that 10 data packets must enter and exit simultaneously.When tasks arrive one by one rather than in batches, pipeline parallelism achieves lower latency than data parallelism.Therefore, for pipeline computing tasks, FPGAs inherently have a latency advantage over GPUs.
ASICs excel in throughput, latency, and power consumption individually.However, their R&D costs are high, and development cycles are long.The flexibility of FPGAs can protect assets.Data centers are rented out for use by different tenants.Some machines have neural network acceleration cards, others have Bing search acceleration cards, and some have network virtualization acceleration cards, making task scheduling and operations cumbersome.Using FPGAs can maintain the homogeneity of data centers.
In communication-intensive tasks, FPGAs have even greater advantages over GPUs and CPUs.
1) Throughput:FPGAs can directly connect to 40Gbps or 100Gbps network cables, processing data packets of any size at line speed;whereas CPUs require network cards to receive data packets;GPUs can also process data packets at high performance, but they lack network ports and similarly require network cards, limiting throughput by the network card and/or CPU.
2) Latency: The network card sends data to the CPU, which processes it and sends it back to the network card, adding instability to the latency due to clock interrupts and task scheduling in the system.
In summary, the main advantage of FPGAs in data centers is their stability and extremely low latency, making them suitable for streaming compute-intensive tasks and communication-intensive tasks.
The biggest difference between FPGAs and GPUs lies in their architecture; FPGAs are better suited for low-latency streaming processing, while GPUs are more suitable for processing large batches of homogeneous data.
Success and failure both depend on the same factors.The lack of instructions is both an advantage and a weakness of FPGAs.Each different task requires a certain amount of FPGA logic resources.If the tasks are complex and not repetitive, they will occupy a large amount of logic resources, most of which will be idle.In such cases, it may be better to use a processor with a von Neumann structure.
FPGAs and CPUs work together, with local and repetitive tasks assigned to FPGAs and complex tasks assigned to CPUs.
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