Understanding CPUs in Embedded Systems

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The CPU is a critical component in digital processing systems. Microcontrollers, microprocessors, and DSPs can all be referred to as CPUs, although they focus on different aspects. Specifically, traditional microcontrollers emphasize embedded computing, such as the 51, AVR, and ARM chips we frequently use, which not only include computational and control functions but also encompass external resources such as timers, serial ports, parallel ports, USB, and I2C buses.

In the case of DSPs, the CPU typically exists as one core of the DSP, which usually includes another core dedicated to digital signal processing. Microprocessors, which we often refer to as processors in PCs, have a more singular focus, concentrating on computational and control function processing.

Therefore, generally speaking, in terms of performance in this area, microcontrollers and DSPs cannot compare to them. With the help of the southbridge and northbridge chips, the PC’s microprocessor can focus on its primary duties, leading to a significant increase in efficiency.

For friends, the most commonly encountered CPU in life is actually the x86 CPU. Of course, if any friend enjoys toys like Apple, they will also know some related matters about ARM. The rest are some specialized CPUs, such as the PowerPC chips used frequently in the communication industry, the Sun SPARC chips used in high-performance servers, and the MIPS chips used in scientific computing. Therefore, regardless of the chip encountered, it is the same for application layer developers, just with some small details needing attention.

Of course, if we are only considering simple application layer design, considering these contents is already quite challenging. However, we are considering how to design embedded operating systems, so we will also look at what is generally included under a CPU. This way, once we have mastered the design and implementation of one CPU, the knowledge of other CPUs will also follow.

Registers: Stack register, PC register, status register, arithmetic register.

Registers are the fundamental resources within a CPU. Regardless of when the CPU’s code execution reaches, these resources are shared, so when the CPU experiences interrupts, function calls, or thread switches, these registers need to be protected. A common basic measure is to save them onto a temporary stack.

The stack register records where the current stack is being used, the PC register records where the current code is executing, and where the next instruction is located, etc. The status register saves the current execution state of the CPU, including whether calculations overflow, whether interrupts are on or off, and whether there are division by zero exceptions, etc.

As for the arithmetic registers, they vary by CPU; some CPUs have fewer registers, such as x86 registers, while others have more, like PowerPC. The purposes of arithmetic registers are many, such as data access, computation, shifting, and returning computation results.

Instruction Set: Addressing instructions, arithmetic operation instructions, logical operation instructions, soft interrupt instructions, jump instructions, remote call instructions, I/O access instructions, stack operation instructions.

The instruction set directly determines the type of CPU to some extent. For example, although CPUs produced by Intel and AMD differ, they both use the x86 instruction set, while CPUs produced by Marwell, Samsung, and Qualcomm are different, but they all use the ARM instruction set.

Therefore, if software runs on Marwell, it can generally also run on Samsung. The instruction set is complex and contains a lot of content. However, usually, the above contents are the types of instructions that CPUs must complete. Of course, the most important are still interrupt and stack processing instructions.

Interrupt and Exception Handling Mechanism

No matter what CPU, the interrupt part is indispensable. Imagine if a CPU only knew to run continuously, its execution efficiency would actually be very low. A CPU with interrupts not only allows the CPU to interact with more peripheral I/O but also greatly improves its own operating efficiency.

Different CPUs handle interrupts in a similar manner; typically, there is an interrupt vector table in the low address area of the entire CPU’s address space, where each entry records the handling function corresponding to each interrupt.

So, whenever an interrupt occurs, the CPU will first push the next PC address onto the stack and then jump to the corresponding interrupt address in the interrupt vector table to execute the corresponding handling function. This process is automatically completed by the CPU, and we need not worry about it.

For us, this is essentially no different from a function call in the CPU. After waiting for the interrupt handling to finish, we use the ret instruction to return to the previously pushed IP address and continue with the following code. The entire process is as if the interrupt never occurred.