In today’s circuit design, the vast majority of scenarios involve mixed-signal circuit designs that integrate both digital and analog components, and the intermediate connection channels in mixed circuits inevitably rely on ADC and DAC.
For example, the joystick inside our daily remote controls operates on the principle of a sliding potentiometer. Some higher-end designs use a linear Hall effect design to enhance reliability and performance. However, for these joystick signals to enter a digital system for processing, the analog signals output from the potentiometer or Hall effect sensor must be quantized, which requires the use of an ADC.
Most engineers’ understanding of ADC may be concentrated on the ADC peripherals of microcontrollers, such as the STM32F103RC, which integrates three independent ADCs with a sampling rate of up to 1MHz and a quantization accuracy of 12 bits (the actual sampling accuracy is only 10.9 bits).
In fact, there are many other packaging forms of ADC. For instance, in electronic scale applications, we need a super high-precision ADC to sample the resistance changes of strain gauges, achieving a precision of 24 bits. This type of ADC initially appeared in single-chip form, but later, driven by the widespread application of electronic scales, some 24-bit ADCs were merged with MCUs.
For video signals or radar applications, we require ADC sampling rates reaching over GHz. Such ADCs are usually designed as standalone ICs with parallel ports or high-speed interfaces like SPI.
Having provided many examples, it is important to note that although these different types of ADCs all quantize analog signals into digital signals, their internal principles vary significantly. Some are designed for high speed, others for high precision, and some aim for a balance, like the integrated ADC in STM32.
Next, let’s look at the various classifications of ADCs:
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Direct-conversion ADC, also known as Flash ADC
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Successive Approximation Register ADC, commonly known as SAR ADC
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Each type of ADC has different operating principles and applicable scenarios.
Today, we will explore the implementation principles of four common types of ADC architectures.
SAR ADC is a method to achieve high precision ADC conversion. It uses a successive approximation method for comparison. It first compares the input signal with a reference voltage, then compares the result with half of the reference voltage, and determines the next comparison threshold based on the results. By continuously repeating this process, the output accuracy approaches higher precision, ultimately yielding the desired digital result, with the number of comparisons equal to the ADC’s quantization depth, or bit depth.
Due to the simple structure of SAR ADC, fast conversion speed, and high precision, it is widely used in digital signal processing. However, because it requires successive approximation, it may experience slow convergence and decreased accuracy when processing unstable or highly interfered signals, so careful evaluation and design are necessary in practical applications.
The ADC in STM32 belongs to the SAR ADC category. The STM32 series chips come with multiple ADC modules, with varying numbers of supported ADC modules and channels across different chip models.
FLASH ADC stands for Flash Analog-to-Digital Converter.
FLASH ADC is an analog signal converter based on comparators and multiple reference voltages. It uses a linear voltage staircase and comparators at each step to compare the input voltage with continuous reference voltages, enabling ADC conversion. Compared to other ADC methods, FLASH ADC offers advantages in speed and accuracy. However, due to its complex circuit structure, the design difficulty is high, necessitating consideration of various influencing factors in practical applications.
FLASH ADC is commonly used in applications requiring high-speed digital processing, such as high-speed data acquisition systems, high-speed communication networks, and ultra-high-definition video.
Sigma-delta ADC stands for Sigma-Delta Modulator Analog-to-Digital Converter.
The working principle of Sigma-delta ADC involves continuously modulating the input signal through a Σ-Δ (sigma-delta) modulator, filtering out high-frequency modulation noise using a digital filter, and finally sampling through a sample-and-hold circuit to convert the analog signal to a digital signal. This architecture allows for high precision results at lower resolutions, making it widely used in audio, video, accelerometers, and temperature measurement applications.
In fact, the understanding of Sigma-delta ADC can be simplified as averaging multiple samples to achieve higher precision. For example, if we sample a voltage of 1V, the current 12-bit precision may not be sufficient, but if we sample 1000 times, we can accumulate the voltage of 1000V for quantization, thus achieving higher average precision.
It is important to note that the conversion speed of Sigma-delta ADC is typically slower than other ADC methods and requires higher clock frequencies and system performance.
Pipeline ADC stands for Pipelined Analog-to-Digital Converter.
Pipeline ADC is a high-speed ADC that uses a multi-stage pipeline structure, dividing the entire ADC conversion process into multiple unit stages, with each unit stage responsible for processing and sampling the output of the previous stage and outputting to the next stage. Since each unit stage only needs to handle a portion of the bits, it can significantly increase the conversion speed. Using a Pipeline ADC allows for high precision and high-speed conversion of analog signals, widely applied in industrial, communication systems, medical electronics, and aerospace fields.
It is important to note that the design and implementation of Pipeline ADC can be complex, and due to multi-stage sampling and the transmission of quantization error noise, the final output digital signal may be subject to significant noise interference, necessitating further processing to achieve a higher signal-to-noise ratio.
