This year, domestic large models have attracted global attention due to their low cost and high performance advantages of open source. Meanwhile, RISC-V (Reduced Instruction Set Computing) chips, based on open source architecture, are seizing new development opportunities with the explosion of AI. The industry believes that with the combination of “open source large models + open source architecture chips,” China is expected to achieve autonomous control of the AI industrial chain.As a major hub in the domestic integrated circuit industry, Shanghai has long been planning for this. Recently, the Shanghai Integrated Circuit Design Industrial Park has added a “RISC-V Ecological Block,” attracting several leading ecological enterprises to settle in. In July this year, Shanghai will once again host the RISC-V China Summit to further promote the gathering of the industrial chain and talent, seizing the industrial opportunity amid the open source wave triggered by domestic large models like DeepSeek.
Transforming Low-End Chips
Computing power, data, and algorithms are the three key elements for training large models. Among them, computing power is the “engine” for training large models, and chips are an unavoidable topic when discussing computing power.
NVIDIA’s graphics processing units are the mainstream choice for training large models, but due to U.S. chip control policies, many domestic large model companies are turning their attention to other chips, with RISC-V chips gradually gaining favor. Wu Dingsheng, founder of Dongbi Technology, told reporters that the biggest advantage of RISC-V chips is their open-source architecture, which does not require any licensing; everyone can use, modify, and expand them for free, unlike the closed architectures of U.S. Intel and UK ARM, which require huge licensing fees. If the international situation changes, the domestic chip industry will be greatly affected.
However, RISC-V chips also have drawbacks. Compared to other chip architectures with over 100 basic instructions, RISC-V has only 47 basic instructions, limiting the chip’s performance, which originally could only be applied to simple smart home and IoT scenarios. However, after more than a decade of development, with the gradual enrichment of the RISC-V open-source ecosystem and more collaborative optimization of software and hardware, RISC-V chips are no longer the low-end chips they once were and can now meet the operational needs of AI large models.
The crowd at the 2025 China International Semiconductor Exhibition is overwhelming
The rise of domestic large models like DeepSeek has led to a surge in computing power demand for AI inference, coupled with various industries localizing the deployment of large models, resulting in many intelligent computing centers facing a shortage of computing power. However, RISC-V chips, with their low power consumption and flexible customization advantages, have the opportunity to change this situation. Bao Yungang, deputy director and researcher at the Institute of Computing Technology, Chinese Academy of Sciences, said at the “Good Hope Science Salon” hosted by Zhongke Chuangxing.
According to data from the RISC-V International Foundation, global shipments of RISC-V chips will exceed 10 billion units in 2024, with 30% applied in AI acceleration scenarios.
Self-Developed Software and Hardware Have Been Verified for Compatibility
In the past, we often heard that Intel’s processor chips were compatible with Microsoft’s Windows system, while ARM architecture chips from the UK rode the wave of Google’s Android system. Each new generation of systems brings new opportunities for different chips. Bao Yungang believes that the arrival of the AI large model era makes RISC-V chips likely to become the “darling”.
Industry insiders told reporters that the domestic RISC-V chip industry is entering the fast lane but still faces challenges such as a lack of cutting-edge technology and high-end talent. Advanced process RISC-V chip design still relies on foreign manufacturers. At the same time, the open-source nature of RISC-V also means a lack of mandatory standards, making it difficult for processors from different manufacturers to be compatible.
Currently, efforts are being made domestically to fill the weak links in the RISC-V industry. In the RISC-V research and development landscape, the U.S., China, and Europe are becoming an innovation triangle.
“RISC-V is leading a paradigm revolution in chip design from ‘proprietary and closed’ to ‘open-source collaboration,'” Bao Yungang stated. In terms of hardware, breakthroughs in self-developed high-performance processors like Xiangshan and Xuantie C930 server chips have verified the feasibility of RISC-V chips in high-performance computing. In terms of software ecology, open-source operating systems and compilers like HarmonyOS and Tongxin UOS have been adapted to RISC-V, and the domestic open-source developer community is active.
Nearly 200 Members in the Industry Alliance
Many interviewed industry insiders mentioned that Shanghai, as a major hub in the domestic integrated circuit industry, has long been planning for the RISC-V industrial ecosystem. As early as 2018, Shanghai initiated the establishment of the China RISC-V Industry Alliance. Currently, Zhangjiang in Pudong New District has formed a complete RISC-V industrial chain covering chip design, manufacturing, and application scenarios.
Zhangjiang Establishes ‘RISC-V Ecological Block’
In the upstream field of the RISC-V industry, companies like Chipone Technology, Chiplet Technology, Pingtouge, and Zhihe Computing in Shanghai can provide a range of chip “IP cores” to support AI acceleration, vector computation, and other modular expansions. In the midstream chip design field, Shanghai has a large number of mature microcontroller and system-on-chip industries, which can be widely applied in smart home, industrial control, and other fields; companies like SMIC and Hua Hong Semiconductor provide technical support for chip manufacturing. In the downstream application field, IoT, edge computing, data center servers, and automotive electronics are all advantageous landing scenarios for Shanghai.
Industry insiders stated that Shanghai, with its top-notch research resources, mature semiconductor industrial chain, policy support, and rich application scenarios, has become the core hub of the domestic RISC-V ecosystem.
Starting in 2024, Zhangjiang Hi-Tech will promote the establishment of a RISC-V Innovation Center and build a public service platform for chip testing, aiming to reduce R&D costs for enterprises and accelerate the entire process from RISC-V design to mass production. The newly added “RISC-V Ecological Block” this year will also attract and gather more industrial chain projects around leading enterprises in the industry. It is reported that the Shanghai Open Processor Industry Innovation Center, Chiplet Technology, Zhihe Computing, and other ecological enterprises have already settled in.
Among them, the Shanghai Open Processor Industry Innovation Center is one of the important chain leaders in the domestic RISC-V ecosystem, with nearly 198 member units in the industry alliance. Zhihe Computing focuses on RISC-V chip research and development, providing general computing and AI inference computing power. “DeepSeek has driven a new round of innovation in large model architecture, presenting a huge opportunity for all computing architectures,” said Meng Jianyi, CEO of Zhihe Computing, noting that the AI-native RISC-V architecture has a greater advantage in this round of competition.
The RISC-V China Summit is currently one of the three major RISC-V summits globally and will be held in Shanghai this July. “As far as I know, the scale and number of participants in this China summit are much larger than those of the North American and European summits,” Bao Yungang stated, emphasizing that Shanghai is the host city for the first RISC-V China Summit, and this summit will continue to leverage Shanghai’s strong industrial foundation and significant radiation effect to accelerate the promotion of the RISC-V ecosystem.
The relevant person in charge of Zhangjiang Hi-Tech stated that they will take the summit as an opportunity to provide high-quality, low-cost entrepreneurial space and professional industrial services for RISC-V-related enterprises, promoting further gathering of the RISC-V industrial chain and talent in Shanghai.
Source: Liberation Daily