From https://github.com/riscv/riscv-isa-manualTranslated by Visual Studio Code CopilotAI Engine: Claude Sonnet 4
3. RV32E and RV64E Base Integer Instruction Set, Version 2.0
This chapter describes the proposal for the RV32E and RV64E base integer instruction sets, designed specifically for microcontrollers in embedded systems. RV32E and RV64E are simplified versions of RV32I and RV64I, respectively: the only change is the reduction of the number of integer registers to 16. This chapter only outlines the differences between RV32E/RV64E and RV32I/RV64I, and should be read after Chapters 2 and 4.
The design of RV32E aims to provide a smaller base core for embedded microcontrollers. RV64E is also of great interest for microcontrollers in large SoC designs and for reducing the context state of highly threaded 64-bit processors.
Unless otherwise specified, standard extensions compatible with RV32I and RV64I are also compatible with RV32E and RV64E, respectively.
3.1. RV32E and RV64E Programmer Model
RV32E and RV64E reduce the number of integer registers to 16 general-purpose registers (<span class="language-plaintext">x0-x15</span>), where<span class="language-plaintext">x0</span> is a dedicated zero register.
We found that in small RV32I core implementations, the upper 16 registers consumed about a quarter of the total core area excluding memory, so removing them can save about 25% of the core area and correspondingly reduce core power consumption.
3.2. RV32E and RV64E Instruction Set Encoding
RV32E and RV64E use the same instruction set encoding as RV32I and RV64I, respectively, but only provide registers<span class="language-plaintext">x0-x15</span>. All encodings specifying other registers<span class="language-plaintext">x16-x31</span> are reserved.
The previous draft of this chapter set all encodings using
<span class="language-plaintext">x16-x31</span>registers as custom available. This version adopts a more conservative approach, reserving these encodings so that they can be allocated between custom space or new standard encodings in the future.