The 5th RISC-V China Summit opened on the 16th in Zhangjiang, Shanghai, with a key agenda on the 18th. As one of the three major RISC-V professional exhibitions globally and the largest annual RISC-V event in China, this conference gathered hundreds of enterprises, research institutions, and open-source technology communities from around the world to share the latest trends and insights in the industry, focusing on high-performance computing, software and ecosystem, and cutting-edge technological innovations.Against the backdrop of a surge in global data center computing power demand and the dual bottlenecks of “efficiency-lock” faced by traditional architectures, this summit serves not only as a platform for technical exchange but also as a key node for solving the global computing power dilemma.
With the explosion of emerging applications such as open-source large models, the metaverse, and scientific computing, global data centers are facing dual challenges of “explosive computing power demand” and “architecture and efficiency lock-in”: traditional architectures have formed supply chain dependencies due to long-term monopolies, leading to high computing power costs and risks of being constrained; while emerging architectures struggle to meet the high computing power scenario demands in terms of performance and ecosystem adaptability, trapping data centers in a dilemma of “upgrading means being limited”.
At this summit, Ruisi Semiconductor made a significant debut with China’s first fully self-developed high-performance RISC-V server processor – the Lingyu Processor, which is a systematic response to this global challenge, attracting industry attention with its “disruptor” stance.
The Lingyu Processor was first launched in March this year, designed specifically for emerging high computing power demand scenarios such as large language models, with performance metrics already comparable to mainstream architecture server processors, marking the emergence of the first domestic server processor that breaks the “impossible triangle” of high performance, self-developed core IP, and self-developed SoC. It is reported that Ruisi Semiconductor has established deep ecological cooperation with leading manufacturers such as Lenovo Group, Sanan Optoelectronics, SenseTime, XSKY, and Dayou Digital Resources through this product, building a complete ecological chain covering core scenarios such as intelligent computing power, not only promoting the large-scale application of RISC-V in data center scenarios through an open ecosystem but also providing flexible supply options for accelerating innovation in global computing power infrastructure, truly achieving a win-win of “computing power efficiency and architectural freedom”.
More importantly, its practical applications directly empower global well-being, such as in the field of intelligent computing, where efficient computing power supports precise drug development, protein molecular prediction, and other cutting-edge research, accelerating breakthroughs in difficult diseases; in the smart city domain, it empowers traffic scheduling, emergency response, and other public services to be more intelligent; in the scientific climate modeling field, rapid calculations provide more accurate scientific basis for global carbon reduction actions. It can be said that Lingyu is not only a “Chinese chip” but also a new generation of “computing power engine” driving the progress of human civilization in the digital age.
In the keynote speech at this summit, Zhang Gangcheng, head of the product ecosystem at Ruisi Semiconductor, unveiled the three core breakthroughs behind the Lingyu Processor as a new generation of computing power engine: full-stack autonomous design, extremely high scalability compatibility, and leading application deployment speed. With these three advantages, Lingyu provides a “Chinese solution” for global data center computing power infrastructure, directly addressing the core pain points of the current global digital economy.
· Zhang Gangcheng, head of the product ecosystem at Ruisi Semiconductor, introduces the core breakthroughs of the Lingyu Processor at the summit
01
Full-stack Self-developed Architecture
Performance Bottleneck
In the field of chip design, there has long been an invisible watershed – one type of solution relies on third-party IP core assembly and integration, making the system difficult to optimize deeply like a “black box”; the other type grasps the entire architecture chain from top to bottom, digging deep into performance potential through self-developed technology. The Lingyu Processor launched by Ruisi Semiconductor is a representative of the latter. Based on a completely self-developed architecture, Lingyu breaks the boundaries of traditional performance optimization, building a chip-level “transparency surgical table” – allowing the R&D team to face scenario bottlenecks directly, implement precise strategies, and achieve performance leaps far exceeding industry inertia.
· Ruisi Semiconductor breaks the boundaries of traditional performance optimization through a fully self-developed chip architecture
Full self-developed architecture is the most important core advantage of the Lingyu Processor. Through a self-designed data path, the processor achieves an advanced out-of-order execution mechanism, making significant breakthroughs in both clock frequency and performance. At the same time, Ruisi Semiconductor conducts in-depth analysis of load characteristics based on real application scenarios, combining self-developed microarchitecture capabilities to promote application-oriented performance optimization, ensuring the chip’s execution efficiency in critical business. Thanks to the full-stack self-development, the team has also built a high-bandwidth on-chip interconnect network system, providing stable support for high-throughput and high-concurrency processing needs, further solidifying the processor’s comprehensive capabilities in emerging computing scenarios.
Specifically, at the micro level, Ruisi Semiconductor achieves dynamic tracking of every instruction in key loads to accurately assess its processing overhead in actual businesses such as intelligent computing, databases, and storage. With a deep grasp of the self-developed microarchitecture, engineers can reconstruct execution units and optimize launch/commit strategies to achieve performance breakthroughs.
At the same time, Ruisi Semiconductor achieves high-frequency solutions under process collaboration through customized data paths. By optimizing high-frequency units through process collaboration and manually laying out sensitive modules to suppress parasitic parameters, signal integrity is improved. This vertical collaborative design breaks the timing bottleneck of traditional hierarchical processes, directly transforming the data path optimization defined at the architecture level into clock frequency gains, achieving a leap in chip performance.
In addition, full self-development can better support domestic production line adaptation and optimization: Ruisi Semiconductor closely collaborates with the manufacturing process, implementing manual layout on critical paths to compensate for process deviations, and continuously optimizing microarchitecture design based on actual process characteristics, establishing a closed-loop iterative mechanism between design and manufacturing.
This “Design-Process Collaborative Optimization” (DTCO) concept brings a new balance paradigm between performance breakthroughs and process iterations for chips.
· Design-process collaborative optimization brings a new balance paradigm between performance breakthroughs and process iterations
Based on a multi-faceted self-developed system including architecture layer, application-oriented optimization, and design-process collaboration, the Lingyu Processor possesses the ability to precisely match various high-load general computing scenarios, and the pace of performance iteration has entered a new acceleration track. “Ruisi Semiconductor will continue to deepen its full-stack self-development capabilities and accelerate the pace of technological iteration,” Zhang Gangcheng stated in his speech.
02
Extreme Hardware Expansion + Standardized Full Compatibility
Redefining the Benchmark for RISC-V General Servers
When data centers face the dilemma of computing power efficiency and architecture lock-in, Ruisi Semiconductor is promoting RISC-V from an alternative option to a new generation of computing power paradigm with a verifiable domestic solution.
Through “hardware expansion” and “standardized compatibility” as dual engines, Ruisi Semiconductor has reshaped the contemporary RISC-V server technology benchmark:
In response to the growing high expansion demands of data centers, the Lingyu Processor achieves dual innovations in memory and PCIe interface design: the memory subsystem adopts an 8-channel DDR5 design specification, supporting up to 16 memory sticks per processor, with memory frequencies reaching up to 6400MT/s, allowing users to flexibly configure capacity based on actual business loads, achieving the optimal balance between performance and cost.
Moreover, the Lingyu Processor’s PCIe expansion capability reaches a new industry height – with 96 PCIe 5.0 lanes acting as a data highway, it can simultaneously support over 20 NVMe all-flash disks, 8 GPU accelerator cards, or 6 400Gbps high-performance network cards. Combined with CXL 2.0 multi-link technology, a single cabinet can build a 320-core computing cluster.
This design directly responds to the urgent demand for massive data throughput in scenarios such as large language model training inference, real-time big data analysis, high-performance computing, and scientific simulation, enabling a single server to complete tasks that traditionally required multiple devices to collaborate.
· The I/O expansion capability of the Lingyu Processor reaches a new industry height
In terms of ecosystem building, the Lingyu Processor demonstrates excellent compatibility and standardization advantages.It fully aligns with the latest RISC-V high-performance processor standards, achieving 100% RVA23 standard compliance, while adhering to the principle of zero custom instruction sets, completely avoiding the risk of ecological fragmentation and endowing the product with robust ecological migration capabilities. Ruisi Semiconductor deeply understands the urgent need for sustainable, standardized software adaptation environments among current RISC-V server customers, thus adhering to the principle of open co-construction, prioritizing the consistency and compatibility of ecological collaboration. This strict adherence to standards not only paves the way for smooth migration of software across different systems and platforms, reducing modifications caused by architectural differences and enhancing code reuse rates but also lays a solid technical foundation for subsequent enterprise-level deployments, helping RISC-V make significant strides in the commercialization process.
Thus, a value closed loop of dual breakthroughs has been formed – hardware expansion ensures performance guarantees, while standardized compatibility solves migration challenges.
03
From Design Breakthroughs
to Agile Commercialization Steps
It is worth noting that Ruisi Semiconductor’s technological advantages are not limited to the laboratory stage but demonstrate strong capabilities in engineering implementation and marketization processes. Starting from breakthroughs in self-developed technology, through engineering reconstruction and iteration, deep collaboration between design and process, to scenario and application adaptation optimization,the Lingyu Processor – this solution that has undergone multiple rounds of wafer polishing and has passed rigorous enterprise-level stress testing, is now capable of stable operation,entering the data center and intelligent computing core battlefield with a “plug-and-play” mature posture.
At a previous press conference, representatives from Lenovo Group and Sanan Optoelectronics disclosed the R&D progress of server products based on the Lingyu Processor, confirming its rapid definition and adaptation capabilities across various scenarios; strategic customers such as SenseTime, XSKY, and Dayou Digital Resources introduced breakthroughs in the deep application of the Lingyu Processor in distributed storage and intelligent computing clusters.Feedback from multiple practical applications further confirms its commercial maturity and the technical and ecological advantages of high performance and high compatibility.
It is reported that the Lingyu Processor has now delivered Alpha version chips and provides complete solutions to partners, supporting full-stack ecosystem partners to quickly carry out software migration and adaptation, promoting the high-performance computing acceleration of the RISC-V architecture.
In terms of specific product forms, Ruisi Semiconductor has launched a 32-core single-socket server solution based on the Lingyu Alpha chip, which possesses comprehensive commercial capabilities.This model is optimized for hybrid storage scenarios, compatible with mainstream domestic and international operating systems such as Fedora, OpenKylin, OpenEuler, and OpenAnolis, combined with standardized firmware support, facilitating seamless integration with existing operation and maintenance systems for enterprises.
Looking towards future general computing and other high-load scenarios, Ruisi Semiconductor is accelerating the launch of the next-generation Lingyu 40-core dual-socket 2U server solution.This model achieves an overall computing power of 80 cores through dual-socket processor configuration, equipped with 32 DDR5 memory (6400MT/s) and a high-density NVMe all-flash storage architecture, supporting the deployment of up to 4 full-spec GPU accelerator cards, enabling a single machine to undertake tasks traditionally requiring multi-node collaboration, significantly improving computing resource utilization and deployment efficiency.
Through continuous self-innovation, comprehensive compatibility with standards, and deep investment in practical implementation, Ruisi Semiconductor is establishing a leading position in the RISC-V high-performance computing track, injecting new momentum into the global open-source computing architecture ecosystem.
Mr. Andrea Gallo, CEO of the RISC-V International Foundation (third from the left), with Dr. Tan Zhangxi, founder and CEO of Ruisi Semiconductor (fourth from the left), and representatives at the summit
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From “Following” to “Leading”: RISC-V Opens a New Paradigm for Global Computing Power Infrastructure
As Zhang Gangcheng stated at the summit: “RISC-V is accelerating from the “marginal alternative” stage to the main battlefield of high-performance servers, and Ruisi Semiconductor will continue to exert efforts to actively promote the deep development of this technological wave.”
The RISC-V open instruction set, which originated from the laboratory of the University of California, Berkeley, breaks the monopoly of instruction sets with its open ecosystem and has emerged as a new force in competition with x86 and ARM. Its core charm lies in its complete openness, allowing global free use and customization; the basic instruction set has fewer than 50 instructions, and multiplication, floating-point, and other extended functions can be freely tailored, allowing developers to add custom instructions to meet specific needs. This flexible design has enabled RISC-V to rapidly grow from an academic experiment to an industrial powerhouse.
With the accelerated development of large language models and intelligent computing, the demand for high-performance computing chips is continuously rising. RISC-V, with its powerful technical extensibility and energy efficiency balance characteristics, is breaking through the boundaries of traditional embedded scenarios at an astonishing speed, expanding into key areas such as intelligent computing and data centers, especially growing rapidly in the Chinese market.
According to IDC predictions, by 2028, the shipment of non-x86 server processors in China will reach 2 million units, and RISC-V architecture is expected to achieve shipments of 1 million units within the next three years, with the market scale exceeding several billion dollars.
As the leading enterprise in high-end RISC-V processor design in China, Ruisi Semiconductor is driving Chinese enterprises to transform from “rule followers” to “rule makers” with its fully self-developed technology, open ecosystem, and rapid iteration capabilities, collaborating with global ecological partners for innovative synergy, breaking the ecological monopoly of traditional architectures, and providing more open and inclusive choices for global computing power infrastructure, establishing a milestone for the advancement of human computing civilization towards “open collaboration”.
Source: Ruisi Semiconductor