Optimal PCB Layer Design for EMC Performance

Optimal PCB Layer Design for EMC Performance

In the consideration of PCB EMC design, the first aspect involves the setting of layers; the number of layers on the board consists of power, ground, and signal layers. In product EMC design, in addition to the selection of components and circuit design, good PCB design is also a very important factor.

Optimal PCB Layer Design for EMC PerformanceOptimal PCB Layer Design for EMC Performance

The key to PCB EMC design is to minimize the return area as much as possible, allowing the return path to flow in the direction we designed. So how can we design the PCB layers to achieve optimal EMC performance?

1. PCB Layer Design Concept

The core of PCB multilayer EMC planning and design is to reasonably plan the signal return path, minimizing the return area of the signal from the board’s mirror layer to achieve magnetic flux cancellation or minimization.

Optimal PCB Layer Design for EMC Performance

Board Mirror Layer

The mirror layer is a complete copper plane layer (power layer, ground layer) adjacent to the signal layer inside the PCB. Its main functions are as follows:

(1) Reduce return noise: The mirror layer provides a low-impedance path for the signal layer return, especially when large currents flow in the power distribution system, the effect of the mirror layer is more pronounced.

(2) Reduce EMI: The presence of the mirror layer reduces the area of the closed loop formed by the signal and return, thus reducing EMI;

(3) Reduce crosstalk: Helps control crosstalk between signal traces in high-speed digital circuits; by changing the height of the signal line from the mirror layer, the crosstalk between signal lines can be controlled, the smaller the height, the less the crosstalk;

(4) Impedance control, preventing signal reflection.

Selection of the Mirror Layer

(1) Both power and ground planes can serve as reference planes and provide some shielding for internal traces;

(2) Relatively speaking, the power plane has a higher characteristic impedance and a larger potential difference with the reference level, while high-frequency interference on the power plane is relatively large;

(3) From the perspective of shielding, the ground plane is generally treated with grounding and serves as a reference point, its shielding effect far exceeds that of the power plane;

(4) When selecting a reference plane, the ground plane should be preferred, followed by the power plane.

2. Magnetic Flux Cancellation Principle

According to Maxwell’s equations, all electrical and magnetic interactions between discrete charged bodies or currents are transmitted through the intermediate area between them, whether the intermediate area is vacuum or solid material. In PCB, the magnetic flux always propagates in the transmission line; if the RF return path is parallel and close to its corresponding signal path, the magnetic flux on the return path is opposite in direction to that on the signal path, thus achieving a flux cancellation effect.

3. The Essence of Magnetic Flux Cancellation

The essence of magnetic flux cancellation is the control of the signal return path, as illustrated below:

Optimal PCB Layer Design for EMC Performance

4. Right-Hand Rule Explanation of Magnetic Flux Cancellation Effect

How to use the right-hand rule to explain the magnetic flux cancellation effect when the signal layer is adjacent to the ground layer is explained as follows:

(1) When there is current flowing through the conductor, a magnetic field is generated around it, and the direction of the magnetic field is determined by the right-hand rule.

(2) When there are two closely spaced and parallel conductors, as shown below, if the current of one conductor flows outward and the current of the other conductor flows inward, and if the currents flowing through these two conductors are the signal current and its return current, then these two currents are equal in size but opposite in direction, so their magnetic fields are also equal in size but opposite in direction, thus they can cancel each other out.

Optimal PCB Layer Design for EMC PerformanceOptimal PCB Layer Design for EMC Performance

5. Six-Layer Board Design Example

Optimal PCB Layer Design for EMC Performance

For the six-layer board, prioritize scheme 3

Optimal PCB Layer Design for EMC Performance

Analysis:

(1) Since the signal layer is adjacent to the return reference plane, S1, S2, and S3 are adjacent to the ground plane, there is the best magnetic flux cancellation effect, with the preferred routing layer S2, followed by S3 and S1.

(2) The power plane is adjacent to the GND plane, and the distance between the planes is very small, providing the best magnetic flux cancellation effect and low power plane impedance.

(3) The main power supply and its corresponding ground are placed on layers 4 and 5; when setting the layer thickness, increase the distance between S2-P while reducing the distance between P-G2 (and correspondingly reducing the distance between G1-S2), to reduce the impedance of the power plane and minimize the power supply’s impact on S2.

Optimal PCB Layer Design for EMC Performance

For the six-layer board, alternative scheme 4

Optimal PCB Layer Design for EMC Performance

Analysis:

For situations requiring high signal integrity in a localized area, scheme 4 is more suitable than scheme 3, as it provides excellent routing layer S2.

Worst EMC effect, scheme 2

Optimal PCB Layer Design for EMC Performance

Analysis:

This structure has S1 and S2 adjacent, and S3 and S4 adjacent, while S3 and S4 are not adjacent to the ground plane, resulting in poor magnetic flux cancellation effect.

Conclusion

Specific principles for PCB layer design:

(1) The component side and soldering side should have a complete ground plane (shielding);

(2) Avoid having two signal layers directly adjacent;

(3) All signal layers should be as close to the ground plane as possible;

(4) High-frequency, high-speed, clock, and other critical signal routing layers should have an adjacent ground plane.Optimal PCB Layer Design for EMC Performance

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Optimal PCB Layer Design for EMC Performance

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