PCB (Printed Circuit Board) is a printed circuit board that can be classified according to the number of conductor layers. It can be divided into single-sided boards with copper on one side, double-sided boards with copper on both sides, and multilayer boards with multiple copper layers.
Multilayer PCBs are usually composed of several double-sided copper-clad core boards (Core) and prepreg (short for PP) combined as needed. Then, copper foil is added to the outer layer and heated and pressed to form multilayer boards with multiple copper layers. Multilayer boards can be further classified according to the number of conductive layers, such as 4-layer boards, 6-layer boards, 8-layer boards, and so forth, continuing in even layers.

You will find a pattern; it seems that multilayer boards always have an even number of layers. This is because the stacking of PCBs needs to maintain symmetry to avoid serious warping deformation due to stress imbalance during processing, which can lead to the scrapping of the PCB.
PCBs were initially used as carriers for electronic components, and interconnecting circuits between components were formed by etching the copper foil on the PCB to replace manual soldering, thereby improving the production efficiency and reliability of electronic products.
After Intel developed the first microprocessor 4004 in 1971, integrated circuits (IC) began to evolve towards large-scale integration (LSI) and very large-scale integration (VLSI). As the amount of data processed continued to increase, the transmission rate of interconnecting signals between electronic components also had to be enhanced. At the same time, the packaging of IC needed to meet the trend of high density. In the 1970s, ball grid array packaging (BGA) began to appear.
With the development of high-density IC packaging and the improvement of signal transmission rates between electronic components, PCBs are no longer simply carriers for electronic components; they have evolved into “multilayer systems” with multiple routing layers.
The term “multilayer system” here refers to multilayer boards, but it emphasizes that this “multilayer system” is not just a few more routing layers than single-sided or double-sided boards. Adding routing layers to achieve interconnection requires careful consideration of various aspects, such as designing for transmission line structures that meet characteristic impedance requirements, utilizing power/ground planes to form planar capacitors to meet power target impedance requirements, and routing high-speed signal lines in the inner layers of the PCB to suppress EMI. This necessitates multilayer board design.
As signal rates further increase, more factors must be considered for this “multilayer system” of PCBs, such as losses caused by the skin effect, copper foil roughness issues, and losses due to substrate polarization. It is essential to carefully design the stacking structure and select suitable materials to meet these requirements.
1. Introduction to Common Stacking Structures of Multilayer Boards
Rigid PCBs typically consist of three basic materials: woven glass cloth, resin, and copper foil.
The weaving method of woven glass cloth is very similar to that used for making clothing fabric.

They come in various styles, ranging from thin to thick, with different specifications, such as:

There are many types of resins, ranging from simple epoxy resins to complex organic compounds like polyphenylene ether resins. These resins are used to impregnate the glass cloth, forming structurally stable core boards, and can also form prepreg (also known as prepreg, PP) in a semi-cured state. The role of PP in multilayer boards is similar to glue; during the lamination process, the resin of the prepreg will re-enter a flowable state under high temperatures and continue to polymerize, achieving adhesion between multiple core boards or between core boards and outer copper foil.
Each layer in a multilayer printed circuit board serves various functions. Some layers contain signal layers with transmission lines, while others serve as power/ground plane layers. Another function of the power/ground plane is to create a planar capacitor with very low parasitic inductance to support the rapid switching transients of logic ICs. After meeting all these mechanical and electrical performance requirements, the stacking must also meet the manufacturability requirements of the board factory.
Therefore, designing based on commonly used stacking templates from PCB manufacturers is a good starting point.
Taking JLCPCB’s stacking template as an example, JLCPCB supports a total of 283 impedance structures for 4-20 layer boards, which is very rich and will continue to increase in the future. These structures have been verified through extensive production and are very mature and reliable. For product stability and ease of production, it is advisable to directly adopt JLCPCB’s existing lamination structures for design.


Of course, if the desired lamination structure is not available, custom options can be chosen, calculated by JLCPCB staff.

Here is the link to JLCPCB’s lamination structures:
https://tools.jlc.com/jlcTools/#/impedanceDefaultTemplate
2. Issues to Consider When Choosing Materials
When designing the stacking of a PCB, many characteristics of the laminate material must be considered.
What is the minimum thickness of prepreg (PP)?
Taking JLCPCB’s lamination structure diagram as an example

The prepreg PP between L1 and L2, as well as L3 and L4, has different specifications and thicknesses.
For high-layer PCBs or PCBs with high-speed transmission lines, we always prefer thinner PPs, especially for high-layer PCBs with multiple PP layers. The thinner the PP layer, the more copper-clad core boards can be combined under a fixed total thickness of the PCB, thus achieving more copper layers.
However, PP cannot be made infinitely thin. According to IPC-4101 rules, the thinnest available PP thickness is 106 woven style, with a resin content of 71%-72% and a thickness of 2 mil. When considering the use of the thinnest PP thickness in stacking design, additional limiting factors must be taken into account. The first consideration is the minimum breakdown voltage between different polar circuit layers. The breakdown voltage for laminate boards based on epoxy or phenolic resin is at least 1000 volts per mil thickness. The minimum thickness for PP is 2 mil, and for conventional products containing logic circuits, the breakdown voltage requirement is DC 1500 volts or lower. Therefore, even if the thinnest PP sheet is selected, it can still meet the electrical strength requirements.
Another consideration is the insufficient thickness caused by the flow of PP resin. During the lamination process, the re-melted resin in the PP will flow to fill the etched copper foil gaps, resulting in reduced thickness after lamination. If the selected PP thickness is too thin, it may lead to short circuits between different copper layers. From experience, the initial thickness of PP must be at least 3 mil to avoid this risk. Therefore, during stacking, it is necessary to avoid using a single 106 PP to prevent insufficient thickness after resin flow, which may cause short circuit failures.
The Influence of PP Glass Cloth Weaving Style
When designing high-speed differential lines for data rates above 10Gbps, attention must be paid to the effects of glass fiber. As mentioned earlier, the substrate of rigid PCBs is typically formed by the cross-linking of resin and woven glass cloth to create a stable physical structure.
However, the dielectric constant of resin does not match that of glass. As shown in the figure below, for PP with 1080 woven style, the weaving between glass fibers will form a void. When cross-linking with resin, this void area will be filled with resin, resulting in inconsistent impedance during signal transmission, which adversely affects high data rate differential signals.

Therefore, when designing stacking for differential lines with data rates of 10Gbps or higher, it is advisable to avoid using only 106, 1080, and 7628 woven styles of PP. Instead, consider mixing two different woven styles of PP or using new “flattened” woven styles of PP like 1067 and 1086.

Choosing the Right Copper Foil Thickness
Copper foil is used as the conductive layer of printed circuit boards. The most commonly used copper foil in rigid PCBs is electrolytic copper foil (ED copper foil). The manufacturing of ED copper foil involves dissolving copper raw materials or waste copper wire in sulfuric acid solution, then electroplating copper onto a cylindrical drum made of stainless steel or titanium in purified copper sulfate/sulfuric acid solution. This process produces copper foil that is smooth and shiny on one side and rough and dull on the other side, as shown below:

Common copper thicknesses on copper-clad boards are0.5 ounces,1 ounce, and2 ounces.1 ounce is approximately0.035mm(1.4 mil), butIPC standards allow for a ±10% tolerance in the thickness of copper-clad boards. Due to the principle of saving copper for profit, most of the time, the initial copper foil thickness received by board manufacturers is1 ounce, which is less than0.035mm(1.4 mil), and during the processing of copper-clad boards in PCB factories, the copper foil will further decrease by6 microns (0.236 mil).
Copper foil serves two purposes in PCBs. One is to form power/ground plane layers, and the other is to form signal layers. During stacking design, it is crucial to balance the thickness of copper foil so that it is thick enough to meet current-carrying requirements while also thin enough to allow for precise etching control. For signal layer copper thickness, smaller line width/spacing requirements necessitate the selection of the thinnest possible copper thickness.

For high-speed signal transmission lines, due to the skin effect, current flows only near the surface of the copper foil. Therefore, using thicker copper foil for high-speed signal transmission lines does not improve performance. In other words, using copper thicker than0.5 ounces in signal layers does not enhance signal integrity and may instead cause etching issues.
Thus, inner copper thickness is typically
HOz, which is0.5 ounces.
3. Calculating Impedance
There are several methods to calculate the impedance of transmission lines in PCBs. These include some formulas applicable under specific conditions, which allow for simple mathematical operations, with results that can meet ±10% impedance tolerance requirements. Additionally, various commercial software tools can be used to calculate impedance by solving Maxwell’s equations for accurate impedance of any shape transmission line.
Formula-based methods are simple and free, while commercial software tools based on field solvers are powerful and versatile, but they require a high learning cost to master their use, and the licensing fees for commercial software are relatively high.
Between simple formulas and commercial software that solves Maxwell’s equations, there is another method for calculating the impedance of transmission lines in PCBs, which is using the free “JLCPCB Impedance Calculation Tool” provided by JLCPCB.
The JLCPCB Impedance Tool provides several commonly used (or reasonable) stacking structures, then incorporates the dielectric constants of PP and solder mask, making it extremely simple to calculate design impedance.
Simply select the required number of layers, board thickness, inner copper thickness, impedance layer, reference layer, and input impedance values, line spacing (differential impedance), and distance from line to copper (co-planar impedance) to automatically calculate line width and stacking scheme.
After calculation, multiple stacking schemes will be obtained, along with recommended common board thickness and layers. It is advisable to prioritize JLCPCB’s recommended stacking schemes for quick delivery and low cost.

The link to the JLCPCB Impedance Calculation Tool is as follows, and you can also click to read the original text:
https://tools.jlc.com/jlcTools/index.html#/impedanceCalculatenew
The JLCPCB Impedance Calculation Tool is an excellent starting point for calculating stacking structures that meet impedance control requirements. If frequency-related losses and copper foil roughness-related losses need to be considered, further assistance from commercial field solvers is required for precise calculations.