Understand how Application-Specific Integrated Circuits (ASICs) enable companies to leverage their core intellectual property (IP) and differentiate themselves from competitors using off-the-shelf integrated circuits (ICs).
Limitations of Off-the-Shelf Integrated Circuits (ICs)
Off-the-shelf integrated circuits (ICs) offer numerous benefits to electronic system designers, the most notable being convenience. Vendors facilitate prototype development solutions and market entry by providing evaluation boards and other support. However, this convenience comes at a cost: it makes differentiation on key metrics valued by customers, such as energy efficiency, functionality, and size, more challenging.
Evaluation boards based on off-the-shelf ICs provide a potential fast track to productization. However, solutions based on these off-the-shelf products inevitably have converging feature sets. System designers have very limited opportunities to optimize specific sensors and displays, meet the computational demands of applications, or tailor optimal power conversion strategies for target use cases.
These limitations are becoming increasingly apparent. Users now want to leverage technologies like machine learning and deploy ultra-low-power systems that can operate for their entire lifespan on a single battery charge. General-purpose ICs mean these users must contend with fixed performance ranges and operating modes, with only minor adjustments to electrical characteristics possible through firmware modifications or external mixed-signal circuits. Additionally, external circuits also increase the overall cost of producing hardware.
Custom ASICs: Unlocking Differentiation Potential
Custom Application-Specific Integrated Circuits (ASICs) can avoid the pitfalls of using off-the-shelf silicon chips throughout the system design. With custom hardware, designers can optimize the system more comprehensively.
For example, a custom hardware accelerator tailored for machine vision algorithms can significantly enhance data throughput while reducing energy consumption. This is feasible because hardware acceleration can replace many software instructions. By saving the data transfer between memory and registers required by general-purpose microprocessor algorithms, throughput can be significantly increased with lower power overhead.
Figure 1. System-level customization using mature node ASICs can enhance integration, power management, and long-term flexibility.
With ASICs, application developers can further optimize by providing valuable insights to hardware design teams. One example is information on how to optimally cut power to individual units during inactive states. However, in many cases, although general-purpose ICs have broad power gating support, the algorithms controlling when units can enter ultra-low-power states must be conservatively applied to ensure that sleep modes do not affect functionality.
In addition to enhancing the ability to optimize hardware for specific applications, custom silicon chips also build a strong barrier against copying. Competitors can easily understand the composition of systems relying on standard ICs in their bill of materials (BOM). Even if the processors in the solution support code encryption, many features provided by the IC vendor are part of their software development kits (SDKs), making reverse engineering the system not an insurmountable obstacle.
Recovering netlists from ASICs requires more extensive analysis and the ability to peel back layers of devices. Even so, imitators still need the resources to understand the relationship between the netlist and system functionality. They must also be able to leverage their own custom IC design resources to replicate it.
| Comparison Criteria | Standard IC | ASIC (Mature Process) |
|---|---|---|
| Differentiation | Low – Competitors use the same chip | High – Custom features and optimized IP |
| Energy Efficiency | Limited by general-purpose design | Optimized power strategies for specific applications |
| Size/Integration | Large BOM due to multiple discrete components | Smaller BOM with miniaturization potential |
| Supply Chain Stability | Susceptible to component obsolescence and shortages | Long-term supply contracts can be signed, potential wafer quotas |
| Copyright Protection/IP Security | System easily reverse-engineered | High barrier to IP theft, difficult to reverse-engineer |
| Cost Structure | Lower upfront costs, higher long-term costs (based on volume) | Higher non-recurring engineering (NRE) costs upfront, lower unit costs at scale |
| Time to Market | Fast prototype development, risk of redesign later | Moderate – but rework is reduced, longer market lifecycle |
Table 1. Commercial and technical comparison between standard ICs and mature node ASICs.
Responding to Market Changes and Supply Chain Risks
The ever-changing market environment presents opportunities for further maintaining competitive advantages. Many competitors will have to wait for general-purpose component vendors to update their product roadmaps. Even if these competitors see the benefits of responding to market changes, these benefits may only apply to a small subset of customers for specific products.
The flip side of the coin is component obsolescence. Users of general-purpose silicon chips are vulnerable to suppliers’ business decisions (such as discontinuing components that no longer meet their sales targets).
Unexpected Advantages of ASICs and Supply Chain Resilience
Using ASICs can also bring unexpected advantages. For example, in the competitive automotive ecosystem, Tier 1 suppliers often operate as contract manufacturers on a planned basis, executing designs specified by original equipment manufacturers (OEMs). If these suppliers do not own the critical intellectual property they use, they risk being commoditized and potentially replaced by competitors focused on cost rather than innovation.
By integrating custom ASICs into their product portfolios, Tier 1 suppliers can gain greater influence. This includes the ability to collaborate with automotive customers to develop custom hardware, positioning suppliers as co-innovators rather than merely component assemblers. For Tier 1 suppliers aiming to meet stringent functional safety requirements, experience in developing ASICs for Automotive Safety Integrity Level D (ASIL-D) applications is particularly valuable. EnSilica has been involved in automotive projects at this level, supporting compliance and system-level optimization.
Events over the past decade have highlighted the importance of supply chain resilience for automotive companies and other businesses. With wafer demand forecasting, ASIC companies can often lock in capacity and schedule wafer production months or even years in advance. This provides greater control over the supply chain, as foundries are reluctant to terminate support for their manufacturing processes.
This reliability in the supply chain directly translates to lower total cost of ownership and sustained product supply capabilities. When it comes to the allocation of ASIC products, there is only one customer—the product cannot be allocated to anyone else. If the ASIC design is intended to cover multiple components in a discrete solution, the number of parts to manage during a supply crisis is also reduced.
Mature Process ASICs: Cost-Effective Customization
ASICs do not need to cover all or even most design functions. Often, significant benefits can be achieved by adding strategically significant custom silicon features that complement general-purpose ICs. Such targeted designs help reduce manufacturing complexity and the scale of the bill of materials (BOM).
For example, a design uses a commercial BLE (Bluetooth Low Energy) IC and a custom 130 nm ASIC for analog and power management. To ensure long-term flexibility, the ASIC is designed with redundant interfaces (such as I2C, SPI, GPIO, and power management modules), allowing it to work with BLE ICs from multiple vendors. This meets the needs for analog BLE, Arm cores, and flash memory while avoiding the high costs of full integration on advanced processes.
Companies often strategically leverage ASIC-based improvements by focusing on the sensor interfaces or power conversion circuits of the system. In many cases, this allows them to integrate multiple discrete components into a single chip. Integrating analog signal conditioning, digital signal processing, and communication interfaces into a single ASIC can miniaturize sensor devices to fit into tight spaces. Custom switching mode strategies tailored for specific motors can enable drones to fly longer on a single charge.
Figure 2. Layout of an analog custom ASIC.
This approach bypasses the need for the costly advanced process technologies used by multi-core processors and other advanced digital device vendors. Internet of Things (IoT) devices, industrial controllers, and automotive control subsystems require support for higher voltages and analog integration, which is far more important than the raw gate counts offered by advanced processes.
Mature CMOS processes like 180 nm and 130 nm provide sufficient performance for target coprocessors and can directly support the voltages required by many sensors and power control devices. ICs manufactured using the latest advanced processes below 10 nm are inefficient in supporting analog circuits and have much higher tape-out costs. A typical 180 nm mask set may cost around $50,000, while it can run into millions of dollars on advanced processes.
Image provided by EnSilica
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