Fusion Compiler (3) Design Environment Management

Design, Lib, and Block Processing

To put it simply, Design refers to the chip design environment constructed by the user, and the entire design environment is stored as a set of nlib, which contains multiple stages of blocks.

### block operation ###create_lib : Create a design librarycreate_block : Create a blocklist_block : List all blocks in the current libopen_block : Open an existing blockget_blocks : Get the pointer to the blockcurrent_block : Display the currently opened blockrename_block : Rename the current block's name save_block : Save the current changes to the currently opened blocksave_block -as $block/$label : Save the current changes as a block named $labelsave_lib : Store all modified blocks in the current nlib to diskclose_blocks : Close the current block; if the block is modified and not saved, an error will occur and storage will stop

It should be noted that for a simple block design, list_blocks will only list the various stage blocks contained in the current nlib. For a top design, list_block will display references to sub-blocks, such as abstract, frame, etc.

The symbols in front of the characters displayed by list_blocks in the above image have the following meanings:* : Indicates newly created or modified openedblocks+ : Indicates unmodified or unsavedopen block– : Indicates unopenedblockcurrent : Indicates the currentblock.lib_cell : Indicateslib cell block

If changes need to be made to a block, to avoid overwriting the originalblock, the recommended process is as follows:

### block copy operation ###open_lib $lib_namecopy_block -from_block $block/$label1 -to_block $block/$label2current_block $block/label2*** any operation ***

If changes need to be made to a third-party nlib, to avoid overwriting the original lib, the recommended process is as follows:

### nlib copy operation ###open_lib $nlib1copy_lib -from_lib $nlib1 -to_lib $nlib2current_block $nlib2:$block/$label*** any operation ***save_lib

In the shell, you can use tar -czvf $nlib or gzip $nlib to save, which can maximize memory savings. Meanwhile, the blocks in the FC tool can be compressed to save disk space. If you want to enable this feature, you need to open the following variable before set_ref_libs.

set_app_options -name  lib.setting.compress_design_lib -value true

Similarly, you can also use the parameter-compress when using save_block or save_lib to achieve the same effect.

Block View Classification

Multiple types of blocks can be created in nlib, reflected as different views. Commonly used include Design View, Frame View, and Abstract View.

1) Layout View: Contains the physical shape information of the block but does not include connection relationships, controlled by lib.workspace.save_layout_views to store Layout View in nlib. It can import Layout View of submodules or leaf cells through the read_gds command.

2) Design View: Contains the physical shape information, connection relationships, and pins of the block, controlled by lib.workspace.save_design_views to store Design View in nlib. It can import Design View of submodules or leaf cells through the read_lef or read_gds -trace * commands.

3) Frame View: Contains the minimum physical data required for block layout and routing, such as boundary,I/O and Power/Ground pins, as well as routing barriers for different metal layers of the block. The Design View is the basis for constructing the Frame View, which is generated by the check_workspace command.

4) Timing View: Contains timing and power information of the block, timing arcs, attributes, etc. It is imported through the read_lib or read_db commands for timing optimization and analysis.

5) Abstract View: Includes timing information related to interfaces and crosstalk information. It is used for interface timing convergence analysis.

Introduction to CLIBs

CLIBs refer to the standard cell library (including logic, timing, and physical data standard cells or IP cells) ndm files, which contain logical and physical models:

1) CLIB consists of *db+*frame or *db+tlef+cell_lef, after creating CLIB, the original.db and.frame files are no longer needed, as shown below:

lappend search_path {path1 path2 ...}set_app_var link_library "1.db 2.db ..."create_lib $target.dlib -technology $tf_file -ref_libs {1.frame 2.frame ...}

2) EachPVT (Process, Voltage, Temperature) .db file is represented as a “pane” in