As the cost of computing power for training large models reaches tens of millions of dollars, and the power consumption of a single GPU exceeds 700 watts, the cost-performance bottleneck of ‘general-purpose chips’ is gradually becoming apparent. At this time, a chip tailored for specific AI tasks—AI ASIC—has become a new choice for tech giants like Google, Meta, and Amazon. This ‘customized’ chip not only improves computing efficiency by 3-5 times but is also quietly reshaping the competitive landscape of the global semiconductor industry.
1. AI ASIC: Chips Tailored for AI Tasks
ASIC (Application-Specific Integrated Circuit) is not a new concept, but in the wave of AI explosion, it has been given a new mission. Compared to general-purpose GPUs, AI ASICs are like ‘custom suits’—optimized for specific scenarios such as large model inference and image recognition, thus achieving a 50% reduction in power consumption while increasing task processing speed by more than 3 times.
1. Core Competitiveness: IP and SoC Design Capabilities
To excel in AI ASIC, two key ‘internal skills’ are essential:
IP Design: Like the foundational modules for building blocks, including high-speed data transmission (SerDes IP), storage interfaces (HBM IP), etc. Leading companies like Broadcom and Marvell have mastered 224G SerDes technology, allowing data transmission between chips to be twice as fast as the mainstream 112G technology in China;
SoC Integration: The ability to integrate multiple IP modules into a complete chip. Star products like Google TPU and Amazon Trainium are supported by the SoC design capabilities of Broadcom and Marvell—they can seamlessly connect computing, storage, and networking modules, improving overall chip efficiency by over 20%.
2. Why Do Major Companies Love It?
Google’s TPUv6 uses ASIC architecture to increase large model training efficiency by 4 times; Meta’s MTIA chip uses customized ASICs to reduce inference costs by 60%; Amazon’s Trainium2, with its ASIC design, achieves a 1-fold increase in computing power while reducing power consumption by 30%. These cases confirm a trend: the more AI becomes widespread, the more valuable customized chips become.
2. Global Landscape: The ‘Duel of Giants’ Between Broadcom and Marvell
Currently, the AI ASIC market is characterized by a ‘duopoly’ led by Broadcom and Marvell, which together hold over 60% of the market share, and their movements directly influence the direction of the industry.
1. Broadcom: The ‘Invisible Champion’ Behind Google and Meta
Broadcom has been deeply involved in the ASIC field for over a decade and is a core partner for Google’s TPU series and Meta’s MTIA chip. In the second quarter of 2025, its AI business revenue exceeded $4.4 billion, a year-on-year increase of 46%, with the customized accelerator business growing at double digits. More astonishingly, its chip gross margin is as high as 60%—this is backed by its self-developed high-speed interfaces, storage IP, and other ‘secret weapons’ that maximize every bit of performance from the chips.
2. Marvell: Amazon’s ‘Exclusive Partner’
Marvell has risen through deep cooperation with Amazon, providing customized ASIC chips for Trainium2, achieving a computing power of 655 TFLOPS (FP16/BF16), supporting Amazon Cloud’s large model training at scale. In the first quarter of 2026, its data center business revenue surged by 76% year-on-year, with AI customized chips contributing significantly to this growth. Currently, it has secured advanced 3nm process capacity and plans to launch a more powerful Trainium3 in 2026.
The success of these two companies proves that mastering core IP and deeply binding with major manufacturers is the winning formula for AI ASIC.
3. Market Space: The ‘Golden Track’ Expected to Exceed $55.4 Billion by 2028
The growth curve of AI ASIC is steepening. According to Marvell’s forecast, the global data center ASIC market size will reach $55.4 billion by 2028, with a compound annual growth rate of 53% from 2023 to 2028, including:
Customized XPU (AI acceleration chips) will reach $40.8 billion, mainly used for large model training and inference;
Supporting accessories (such as high-speed network cards, power management chips) will reach $14.6 billion, with even faster growth, achieving a compound annual growth rate of 90%.
The driving forces behind this are two major trends: first, companies like Google and Meta plan to deploy ‘million-card-level’ AI clusters, leading to an exponential increase in demand for customized chips; second, the ‘mixing’ of ASICs and GPUs is becoming mainstream—using GPUs for flexible training and ASICs for efficient inference, this combination can reduce the overall computing cost of data centers by 40%.
4. Domestic Breakthrough: From ‘Following’ to ‘Partial Breakthrough’
Domestic manufacturers are accelerating their catch-up in the AI ASIC race. Although there is still a gap compared to leading overseas companies, breakthroughs have been achieved in certain areas:
Chipone: Possesses self-developed GPU, NPU, and other processor IP, providing one-stop customized services covering processes from 5nm to 250nm, and plans to customize chips for multiple AI companies in 2024, with a gross margin of about 15%. As AI scenarios penetrate, there is significant room for future growth;
Aojie Technology: Leveraging the advantages of SoC platformization, it provides customized services for AI algorithm companies, with a projected gross margin of about 40% for customized business in 2024, having achieved small-scale production in edge AI scenarios;
Technical Bottlenecks: Domestic manufacturers still rely on licensing for core IP such as 224G high-speed SerDes and advanced packaging, which is a ‘bottleneck’ that needs to be broken through in the future.
5. Industry Summary: Three Major Future Trends of AI ASIC
‘Customization’ Becomes Standard for Major Companies
Google, Amazon, and others will continue to increase investment in self-developed ASICs. By 2030, the proportion of customized chips in AI computing power is expected to rise from the current 25% to 40%, forming a ‘complementary coexistence’ pattern with GPUs.
Technical Barriers Shift to ‘IP Ecosystem’
High-speed interfaces (SerDes), storage interconnects (HBM), and advanced packaging (Chiplet) will become the core of competition. Whoever can build a self-controllable IP system will take the initiative in cost and efficiency.
Domestic Manufacturers Achieve ‘Segmented Breakthroughs’
Domestic companies may first open gaps in edge AI and dedicated inference scenarios, gradually penetrating into core training chips, with the expectation that by 2028, the global market share of domestic AI ASICs will rise to 10%-15%.
From general-purpose GPUs to customized ASICs, the chip industry is undergoing an ‘efficiency revolution.’ For enterprises, AI ASICs are not only tools for cost reduction and efficiency enhancement but also the key to mastering the discourse power of computing in the AI era. This wave of ‘customization’ will also bring new players, new rules, and new opportunities to the semiconductor industry.