This live stream is a training course for the Amlogic Technology Cup of the Innovation Competition, mainly sharing the design and implementation of a music player based on Cortex-M0 on the FPGA chip from Anlu Technology.
First, the course will review the basic principles of FPGA and its development process, introducing the resources of the EG4S20BG256 chip and its supporting peripherals.
Secondly, a brief introduction to the principle of the buzzer on the FPGA development board will be provided, explaining the design principles of a simple music player IP aimed at the buzzer, allowing students to understand the process of playing music with a passive buzzer.
Based on this, the instructor will share how to integrate the simple music player IP into Cortex-M0 and control the integrated IP core through interrupt service functions, enabling students to learn how to control the integrated IP based on the interrupt system on Cortex-M0 and further design the interrupt service program.
Designing a Music Player Based on Cortex-M0
Scan the QR code on the right side of the screen
Broadcast Time:
April 22, 2023 (This Saturday evening) 20:00
Content Outline:
Instructor Introduction:
Xu Yinan, System Solution Engineer at Anlu Technology
Graduate student at the University of Electronic Science and Technology, working as a system solution engineer at Anlu Technology, and also serving as a teaching assistant for the course “Microprocessor System Architecture and Embedded System Design” in the Integrated Circuit major at the University of Electronic Science and Technology in 2023.
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