The research team led by Professor Hu Jianguo from Sun Yat-sen University’s School of Microelectronics has conducted research on low-power Turbo encoding and decoding for the NB-IoT communication standard. The related results are published under the title “Design of Low-Power Turbo Encoder and Decoder for NB-IoT” in the Chinese Journal of Electronics, 2024, Issue 2.
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Article Introduction
Turbo codes are an error correction encoding and decoding scheme that approaches the Shannon limit, widely used in wireless data transmission to improve the reliability of signal transmission in noisy channels. Traditional encoding and decoding, while having good error correction performance, involve computational steps including forward recursion and backward recursion, requiring large amounts of storage space and computational resources, leading to significant decoding delays and power consumption. With the development of NB-IoT technology, the demand for low-power encoders and decoders is increasing, especially in battery-powered terminal devices where reducing energy consumption is particularly important.
The main contributions of the article include:
1. Encoder Optimization: A parallel Turbo encoding circuit scheme has been designed by reusing the component system convolutional encoder, introducing a data control end, and optimizing the overall circuit structure, effectively reducing power consumption during the encoding process. This reuse design reduces energy consumption on the data processing path and achieves more efficient data distribution through control logic.
Figure 1: The low-power Turbo encoder proposed in this paper
2. Low-Power Interleaver: A recursive computation method is used instead of the traditional direct computation, reducing the number of computation modules in the circuit and avoiding the large-scale storage requirements of traditional interleavers, significantly reducing the power consumption of the interleaver.
3. Parallel Decoder Design: The Turbo decoder designed based on the Max-Log-MAP algorithm employs a parallel computation method. By merging state metric computation modules, only one state metric value needs to be computed to obtain all state metric values in the decoder, effectively reducing the overall power consumption of the decoder. This design uses a controller to manage the parallel operation of component decoders while optimizing the state transition computation logic, further reducing decoder power consumption.
Figure 2: The low-power Turbo encoder proposed in this paper
The research team implemented the proposed Turbo encoder and decoder design using the Verilog hardware description language, conducting detailed analysis and power consumption comparisons. Experimental results show that at a frequency of 125 MHz, the dynamic power consumption is below 50 milliwatts, achieving a 40% reduction in total power consumption across the chip compared to previous works. The designed hardware scheme not only performs excellently in terms of power consumption but also exhibits decoding performance comparable to traditional decoding methods using the same decoding algorithm. This demonstrates that under low-power conditions, the Max-Log-MAP algorithm can also provide reliable decoding performance.
The Turbo encoder and decoder proposed in this paper successfully reduce the power consumption of the Turbo encoder and decoder by reusing component encoders, optimizing interleaver design, and employing parallel decoding algorithms, thereby lowering the energy consumption of key components in NB-IoT communication and improving the system’s energy efficiency. Future research could further explore how to optimize decoding latency while maintaining low power consumption, achieving more efficient and faster wireless data transmission.
Author Introduction
Zhang Chong, graduated in June 2023 from the School of Microelectronics at Sun Yat-sen University with a Master’s degree in Engineering. His main research directions include digital circuit design, multi-mode IoT node chips, and NB-IoT.
Hu Jianguo, Professor and Researcher, obtained his Bachelor’s and Master’s degrees from the National University of Defense Technology in 2000 and 2004 respectively, and his PhD in Communication and Information Systems from the School of Information Science and Technology at Sun Yat-sen University in 2010. He is the Chief Scientist of the National Key Technology Research and Development Program 2030, a leading talent in the Guangdong Province “Special Support Plan”, and the Director of the Guangdong Provincial Key Laboratory of High-end Integrated Circuit Design and Integration Technology. He has presided over dozens of national and provincial key projects and has developed more than 30 chips.
Citation Format
Chong ZHANG, Yuhang LIN, Deming WANG, et al., “Design of Low-Power Turbo Encoder and Decoder for NB-IoT,” Chinese Journal of Electronics, vol. 33, no. 2, pp. 403–414, 2024 doi: 10.23919/cje.2022.00.225
Email: [email protected]
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