Before discussing buses, we should first understand what a bus is. According to the complete definition from Baidu: A bus is a common communication line for transmitting information between various functional components of a computer. It is a transmission line composed of wires, categorized according to the type of information transmitted by the computer.
In fact, I think of a bus as an internal structure; it is a common channel for transmitting information among the CPU, memory, input, and output devices. Engineers often use a set of lines, configured with appropriate interface circuits, to connect various components and peripheral devices. This shared connection line is called a bus. Additionally, adopting a bus structure facilitates the expansion of components and devices, especially when a unified bus standard is established, making it easier to interconnect different devices.
Classification of Buses:
1. Buses can be classified into five major types based on function and specification: data bus, address bus, control bus, expansion bus, and local bus.
The data bus, address bus, and control bus are collectively referred to as the system bus, which is what is commonly meant by ‘bus’. Common data buses include ISA, EISA, VESA, PCI, etc.
Address Bus: This is specifically used to transmit addresses. Since addresses can only be sent from the CPU to external memory or I/O ports, the address bus is always unidirectional and tri-state, which is different from the data bus. The number of bits in the address bus determines the size of the memory space that the CPU can directly address.
Control Bus: This is used to transmit control signals and timing signals. Some control signals are sent from the microprocessor to memory and I/O interface circuits; others are feedback signals from other components to the CPU, such as interrupt request signals, reset signals, bus request signals, device ready signals, etc.
2. Based on the method of data transmission, buses can be divided into serial buses and parallel buses. In a serial bus, binary data is sent bit by bit through a single data line to the destination device; parallel buses usually have more than two data lines. Common serial buses include SPI, I2C, USB, and RS232, etc.
3. Based on whether the clock signal is independent, buses can be divided into synchronous buses and asynchronous buses. The clock signal of a synchronous bus is independent of the data, while the clock signal of an asynchronous bus is extracted from the data. SPI and I2C are synchronous serial buses, while RS232 uses an asynchronous serial bus.
4. In microcomputers, buses generally include internal buses, system buses, and external buses. The internal bus is the bus between peripheral chips and the processor within the microcomputer, used for chip-level interconnection; the system bus is the bus between various plug-in boards and the system board, used for plug-in board-level interconnection; the external bus is the bus between the microcomputer and external devices, allowing the microcomputer to exchange information and data with other devices through this bus, used for device-level interconnection.
With so many classifications, I can only choose one to introduce, so I will choose internal bus, system bus, and external bus.
Internal Bus
I2C Bus: The I2C (Inter-IC) bus was introduced by Philips over a decade ago and has become a widely adopted new bus standard in the field of microelectronic communication control. It is a special form of synchronous communication, characterized by having fewer interface lines, simplified control methods, smaller device packaging, and relatively high communication speeds. In master-slave communication, multiple I2C bus devices can be connected to the I2C bus simultaneously, identified by their addresses.
SCI Bus: The Serial Communication Interface (SCI) was also introduced by Motorola. It is a general asynchronous communication interface (UART) and is fundamentally the same as the asynchronous communication function of MCS-51.
IIS: The I2S (Inter-IC Sound Bus) is a bus standard developed by Philips for audio data transmission between digital audio devices. I2S has three main signals: 1. Serial clock SCLK, also known as bit clock, corresponding to each bit of digital audio data, with one pulse per SCLK. 2. Frame clock LRCK, used to switch between left and right channel data. LRCK being ‘1’ indicates that left channel data is being transmitted; ‘0’ indicates right channel data is being transmitted. 3. Serial data SDATA, which represents audio data in binary two’s complement. Sometimes, to better synchronize between systems, an additional signal MCLK, known as the master clock or system clock, is also transmitted.
SPI: SPI (Serial Peripheral Interface) was first defined by Motorola in its MC68HCXX series processors. The SPI interface is primarily used between EEPROM, FLASH, real-time clocks, AD converters, and between digital signal processors and digital signal decoders. The SPI interface operates in a master-slave mode, typically with one master device and one or more slave devices, with the following four signal types: (1) MOSI – Master Out Slave In (data output from master, data input to slave) (2) MISO – Master In Slave Out (data input to master, data output from slave) (3) SCLK – Clock signal generated by the master device (4) /SS – Slave select signal controlled by the master device.
UART: UART (Universal Asynchronous Receiver Transmitter) converts parallel data transmitted from within the computer into an output serial data stream. It converts incoming serial data from external sources into bytes for use by devices that require parallel data within the computer. The output serial data stream includes a parity bit, and the data stream received from external sources is checked for parity. Start and stop markers are added to the output data stream, while they are removed from the received data stream. It can handle interrupt signals generated by the keyboard or mouse (as both are serial devices). It can also manage synchronization issues between the computer and external serial devices. Some higher-end UARTs also provide buffers for input and output data. Common signals include TXD, RXD, /RTS, /CTS.
JTAG: JTAG (Joint Test Action Group) is an international standard testing protocol (IEEE1149.1 compliant), primarily used for internal chip testing. The standard JTAG interface consists of four lines: TMS, TCK, TDI, TDO, which are for mode selection, clock, data input, and data output, respectively. The test reset signal (TRST, generally active low) is usually an optional fifth port signal. A CPU with a JTAG Debug interface module can access the internal registers of the CPU and devices connected to the CPU bus, such as FLASH, RAM, and registers of built-in modules like UART, Timers, GPIO, etc., as long as the clock is functioning properly.
CAN: CAN stands for Controller Area Network, which is one of the most widely used field buses internationally. Initially, the CAN bus was designed for microcontroller communication in automotive environments, exchanging information between various electronic control units (ECUs) in vehicles to form an automotive electronic control network. For example, the engine management system, transmission controller, instrumentation equipment, and electronic backbone systems all embed CAN control devices. In a single network composed of CAN buses, theoretically, countless nodes can be connected. In practical applications, the number of nodes is limited by the electrical characteristics of the network hardware. For instance, when using the Philips P82C250 as a CAN transceiver, up to 110 nodes are allowed on the same network. CAN can provide data transmission rates of up to 1Mbit/s, making real-time control very easy. Additionally, the hardware’s error detection features enhance CAN’s resistance to electromagnetic interference.
SDIO: SDIO is an extension interface for SD cards, which can connect not only to SD cards but also to devices that support the SDIO interface. The socket’s purpose is not limited to inserting storage cards. Devices such as PDAs and laptops that support the SDIO interface can connect to devices like GPS receivers, Wi-Fi or Bluetooth adapters, modems, LAN adapters, barcode readers, FM radios, TV receivers, RFID readers, or digital cameras that use the SD standard interface.
GPIO: GPIO (General Purpose Input Output) or bus extenders simplify I/O port expansion using industrial standard I²C, SMBus™, or SPI™ interfaces. When microcontrollers or chipsets do not have enough I/O ports, or when the system requires remote serial communication or control, GPIO products can provide additional control and monitoring functions.
System Bus
ISA Bus: The ISA (Industrial Standard Architecture) bus standard was established by IBM in 1984 for the release of the PC/AT, hence also known as the AT bus. It is an extension of the XT bus to meet the requirements of 8/16-bit data buses. It was widely used during the 80286 to 80486 era, to the extent that ISA bus slots are still retained in modern Pentium machines. The ISA bus has 98 pins.
EISA Bus: The EISA bus was jointly launched in 1988 by Compaq and eight other companies. It uses a double-layer socket based on the ISA bus, adding 98 signal lines to the original 98 ISA signal lines, effectively inserting an EISA signal line between every two ISA signal lines. In practice, the EISA bus is fully compatible with ISA bus signals.
VESA Bus: The VESA (Video Electronics Standards Association) bus was launched in 1992 by 60 peripheral card manufacturers as a local bus, commonly referred to as the VL (VESA Local Bus) bus. Its introduction laid the foundation for the innovation of microcomputer system bus architecture. This bus system considers the direct connection between the CPU and main memory and Cache, typically referred to as the CPU bus or main bus, while other devices connect to the CPU bus via the VL bus, hence the VL bus is called a local bus. It defines a 32-bit data line, which can be extended to 64 bits through expansion slots, using a clock frequency of 33MHz, with a maximum transmission rate of 132MB/s, and can work synchronously with the CPU. It is a high-speed, efficient local bus that supports 386SX, 386DX, 486SX, 486DX, and Pentium microprocessors.
PCI Bus: The PCI (Peripheral Component Interconnect) bus is currently one of the most popular buses, introduced by Intel as a local bus. It defines a 32-bit data bus, which can be expanded to 64 bits. The PCI bus motherboard slot is smaller than the original ISA bus slot, and its functionality is significantly improved compared to VESA and ISA, supporting burst read/write operations with a maximum transmission rate of 132MB/s, and can simultaneously support multiple peripheral devices. The PCI local bus is not compatible with existing ISA, EISA, or MCA (Micro Channel Architecture) buses but is not restricted to the processor and has been developed based on new generation microprocessors like the Pentium.
External Bus
RS-232-C Bus: RS-232-C is a serial physical interface standard established by the Electronic Industries Alliance (EIA) in the United States. RS is short for ‘Recommended Standard’, 232 is the identification number, and C indicates the number of modifications. The RS-232-C bus standard has 25 signal lines, including one main channel and one auxiliary channel, with the main channel being primarily used in most cases. For general duplex communication, only a few signal lines are required, such as one transmission line, one reception line, and one ground line. The RS-232-C standard specifies data transmission rates of 50, 75, 100, 150, 300, 600, 1200, 2400, 4800, 9600, 19200 baud. The RS-232-C standard allows drivers to have a capacitive load of 2500pF, and communication distance will be limited by this capacitance. For example, with a communication cable of 150pF/m, the maximum communication distance is 15m; if the capacitance per meter is reduced, the communication distance can be increased. Another reason for the short transmission distance is that RS-232 uses single-ended signal transmission, which suffers from common ground noise and cannot suppress common-mode interference, thus generally used for communications within 20m.
RS-485 Bus: The RS-485 serial bus standard is widely used when communication distances range from several dozen meters to several kilometers. RS-485 uses balanced transmission and differential reception, thus having the ability to suppress common-mode interference. Additionally, the bus transceiver has high sensitivity, capable of detecting voltages as low as 200mV, allowing the transmission signal to be recovered over kilometers. RS-485 operates in half-duplex mode, meaning only one point can be in transmission state at any time, thus the transmission circuit must be controlled by an enable signal. RS-485 is very convenient for multipoint interconnection, saving many signal lines. Using RS-485 can form a distributed system that allows for the parallel connection of up to 32 drivers and 32 receivers.
IEEE-488 Bus: The IEEE-488 bus is used to connect systems, such as microcomputers, digital voltmeters, digital displays, and other instruments, which can be assembled using the IEEE-488 bus. It transmits signals in a bidirectional asynchronous manner, using a bus connection method where the instruments are directly connected to the bus without intermediary units, but up to 15 devices can be connected to the bus. The maximum transmission distance is 20 meters, and the signal transmission speed is generally 500KB/s, with a maximum transmission speed of 1MB/s.
USB Bus: The Universal Serial Bus (USB) was jointly introduced by seven world-renowned computer and communication companies, including Intel, Compaq, Digital, IBM, Microsoft, NEC, and Northern Telecom. It is a new interface standard based on universal connection technology, achieving simple and fast connections for peripherals, aiming to facilitate users, reduce costs, and expand the range of PC-connected peripherals. It can provide power to peripherals, unlike traditional devices that use serial and parallel ports which require separate power systems.
Additionally, automotive electronics have recently gained popularity, and I would like to discuss the LIN and CAN buses in automotive networks:
As early as 1983, Bosch began developing the Controller Area Network (CAN) bus, officially releasing the relevant protocol in 1986. Currently, there are multiple automotive bus standards, but CAN remains the most popular standard. In a CAN network, all nodes (originating from different ECUs) act as master nodes (i.e., there is no master-slave topology), and no specific addresses are assigned. Instead, messages carry identifiers.
At any given time, multiple nodes can send data to the CAN bus simultaneously. The message identifier helps determine the priority of the message. The highest-priority message will cause the CAN bus to enter a dominant state, while all other nodes will stop sending. These nodes are essentially transceivers, and apart from sending messages, they can also look up specific messages from the bus according to specific functions. Therefore, information flow occurs between different nodes connected by the CAN bus.
Due to multiple error checks such as fill errors, bit errors, checksum errors, frame errors, and acknowledgment errors, CAN possesses high reliability. CAN supports data transmission rates of up to 1Mbps, making it the default choice for connecting critical ECU functions in vehicles (such as transmission, temperature sensors, etc.).
But why do vehicles choose LIN?
The role of automotive electronics is not limited to these critical units. The body electronics market has been growing for years. Typical body control applications include seats, windows, intelligent wipers, and automotive air conditioning sensors, among others. The key requirement for body electronics is to ensure that vehicles are more comfortable and safer. Although these systems may not require the high reliability of critical ECUs, they still need a certain automotive network communication standard.
Comparison of LIN and CAN:
Implementing CAN is more expensive than implementing LIN. Factors contributing to the higher cost of CAN include:
– Each node in the CAN network requires a clock generator or crystal;
– The chip-level implementation of CAN is more complex;
– It uses dual-wire transmission.
The most important point is that the entire expensive architecture is too extravagant for applications that do not require high reliability and high data rates.
That concludes the overview of various buses; I hope it helps engineers in some way.
Source: Electronic Enthusiast Network
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