Chapter 18 of FreeRTOS: Multi-Core Scheduling (SMP Extension)

Table of Contents

    • 1. Overview of SMP Architecture
      • 1.1 Basic Concepts
      • 1.2 FreeRTOS-SMP Features
    • 2. Inter-Core Task Migration Experiment
      • 2.1 Experiment Objectives
      • 2.2 Experiment Steps
      • 2.3 Experiment Result Analysis
    • 3. Protection of Shared Resources in Multi-Core Systems
      • 3.1 Common Issues
      • 3.2 Comparison of Solutions
      • 3.3 Example Code
    • 4. Key API Analysis
      • 4.1 SMP Extension APIs
      • 4.2 Configuration Parameters
    • 5. Performance Optimization Suggestions

Chapter 18 of FreeRTOS: Multi-Core Scheduling (SMP Extension)

1. Overview of SMP Architecture

1.1 Basic Concepts

#define configNUMBER_OF_CORES 2 // Dual-core configuration example
  • Symmetric Multi-Processing (SMP) characteristics:
    • All cores have equal access to shared memory
    • Unified task scheduling view
    • Dynamic load balancing

1.2 FreeRTOS-SMP Features

Feature Description
Global Task Queue All cores share the task ready queue
Affinity Supports task binding to specific cores
Lock-Free Scheduling Algorithm Reduces inter-core contention

2. Inter-Core Task Migration Experiment

2.1 Experiment Objectives

  • Observe dynamic migration of tasks between cores
  • Validate load balancing mechanism

2.2 Experiment Steps

void vTaskMigrationDemo(void* pvParams) {
    for (;;) {
        // Print current running core ID
        UBaseType_t coreId = xPortGetCoreID();
        printf("Task running on Core %d\n", coreId);
        vTaskDelay(pdMS_TO_TICKS(500));
    }
}

2.3 Experiment Result Analysis

  • Migration Trigger Conditions:
    • Uneven core load
    • Task voluntarily relinquishing CPU
    • Scheduler tick interrupt

3. Protection of Shared Resources in Multi-Core Systems

3.1 Common Issues

  • Cache Coherency issues
  • Priority Inversion amplified across cores
  • Increased Probability of Deadlock

3.2 Comparison of Solutions

Method Applicable Scenarios Overhead
Spinlock Short critical sections Low
Mutex Long critical sections Medium
Inter-Core Interrupt (IPI) Urgent synchronization needs High

3.3 Example Code

// Using SMP-compatible mutex
SemaphoreHandle_t xCrossCoreMutex = xSemaphoreCreateMutex();

void vSafeAccessResource(void) {
    if (xSemaphoreTake(xCrossCoreMutex, portMAX_DELAY) == pdTRUE) {
        // Safely access shared resource
        xSemaphoreGive(xCrossCoreMutex);
    }
}

4. Key API Analysis

4.1 SMP Extension APIs

// Set task affinity
vTaskCoreAffinitySet(TaskHandle_t xTask, const UBaseType_t uxCoreAffinityMask);

// Get current core ID
BaseType_t xPortGetCoreID(void);

4.2 Configuration Parameters

# FreeRTOSConfig.h key configurations
#define configUSE_CORE_AFFINITY 1
#define configUSE_SMP 1
#define configNUM_CORES 2

5. Performance Optimization Suggestions

  1. Cache-Friendly Design:

  • Keep frequently accessed data in a single core’s cache
  • Use <span>vTaskCoreAffinitySet</span> to limit migration
  • Lock Granularity Control:

    • Fine-grained locks are better than coarse-grained locks
    • Consider read-write locks as alternatives to mutexes
  • Monitoring Tools:

    • Use <span>uxTaskGetSystemState()</span> to monitor load
    • Track <span>xPortGetCoreID()</span> to analyze task distribution

    Best Practice: For time-critical tasks, it is recommended to run on fixed cores to reduce migration overhead

    Leave a Comment