Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

Table of Contents

1. What are the advantages of ARM+FPGA architecture?

2. What are the benefits of discrete ARM+FPGA?

2.1 More interface resources

2.2 Better HMI experience

2.3 Higher ARM main frequency

2.4 Lower development difficulty

3. Free evaluation board trial

4. Product documentation download

1. What are the advantages of ARM+FPGA architecture?

Compared to pure ARM or pure FPGA devices, the ARM+FPGA architecture can bring combined advantages in performance, cost, and power consumption. Each performs its own role, leveraging the unique advantages of its architecture, such as:

(1) ARM has rich interface resources and low power consumption, excelling in multimedia display and logic control.

(2) FPGA excels at multi-channel or high-speed AD acquisition, interface expansion, and high-speed signal transmission.

ARM and FPGA can quickly exchange data through high-speed communication interfaces, meeting various industrial application scenarios.

2. What are the benefits of discrete ARM+FPGA?

The ZYNQ series devices from Xilinx are classic ARM+FPGA SoC processors (ARM and FPGA packaged on the same chip), integrating single/dual-core ARM Cortex-A9 + Artix-7/Kintex-7 FPGA.

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

Because ZYNQ is an SoC device, it has the following advantages:

(1) High hardware integration, smaller size.

(2) Higher communication speed between ARM and FPGA.

(3) Peripheral interfaces can be flexibly configured.

However, some users may encounter the following issues when using ZYNQ (specifically referring to XC7Z010/XC7Z020), due to different functional requirements of the products:

(1) Limited interface resources.

(2) Poor HMI experience.

(3) Lower ARM main frequency.

(4) Higher development difficulty.

Tronlong Technology has launched the discrete ARM + FPGA industrial-grade core board SOM-TL437xF, which can perfectly solve the above issues.

The SOM-TL437xF core board integrates AM437x (TI ARM Cortex-A9) + Spartan-6 (Xilinx FPGA) processor, with internal ARM and FPGA connected via a GPMC high-speed parallel bus, with a communication speed of up to 624Mb/s.

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

(SOM-TL437xF core board video introduction)

2.1 More interface resources

ZYNQ has limited interface resources, so in practical applications, interface resources are often insufficient.

The SOM-TL437xF core board supports native LCD, CAMERA, GPMC, audio interfaces, and can support up to 4 native Ethernet ports, 6 native UART interfaces, with the number of USB, SDIO, SPI, and other interfaces all exceeding ZYNQ.

The ZYNQ FPGA has no dedicated RAM, while the FPGA side of the SOM-TL437xF core board is configured with 256M/512MByte dedicated DDR3, facilitating large data preprocessing on the FPGA side. The FPGA side of the SOM-TL437xF core board can support a maximum of 138 IOs.

Core board hardware resources

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

Evaluation board hardware resources

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC
Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

(TL437xF-EVMevaluation board video introduction)

2.2 Better HMI experience

ZYNQ has no native LCD interface, making it impossible to connect to a display. Even if the LCD interface is expanded, the experience of the Qt interface and touch functionality is difficult to satisfy.

The SOM-TL437xF core board supports native LCD interfaces, using the system’s built-in Qt system (Qt-5.7.1), perfectly supporting touch functionality, and can also add HDMI circuitry to the baseboard to achieve HDMI output functionality.

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC
Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

2.3 Higher ARM main frequency

ZYNQ has a main frequency of 667MHz (-1)/766MHz (-2)/866MHz (-3), and the 866MHz (-3) version chip is relatively expensive, with few customers using it in the market, and it is not easy to purchase.

The SOM-TL437xF core board’s ARM side has a main frequency of 1.0GHz, and also comes with 4 PRU units (similar to microcontrollers) for data co-processing.

2.4 Lower development difficulty

ZYNQ is an SoC architecture, and traditional ARM and FPGA developers need to familiarize themselves with heterogeneous multi-core development frameworks and processes, which makes inter-core communication and ARM-FPGA communication development difficult. Even for experienced engineers, it takes considerable time to get familiar with.

The SOM-TL437xF core board has a discrete structure, with ARM and FPGA as independent chips, allowing developers to use traditional processes for development. Compared to ZYNQ SoC, the discrete structure clearly saves engineers’ time to familiarize themselves with the development process, making the development difficulty lower and speeding up product development time.

3. Free evaluation board trial

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

(Free trial application QR code)

4. Product documentation download

Core board hardware documentation, user manuals, product specifications, etc. can be obtained by clicking the link below or scanning the QR code.

http://site.tronlong.com/pfdownload

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

Technical communication group

AM437x group:373129850, 487528186

Spartan-6 group: 311416997, 101245165

ZYNQ group: 645235672, 193393878

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

For more solutions, please contact Tronlong:

Sales email: [email protected]

Technical email: [email protected]

Tronlong switchboard: 020-8998-6280

Technical hotline: 020-3893-9734

Tronlong official website: www.tronlong.com

Technical forum: www.51ele.net

Official store: https://tronlong.taobao.com

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

Tronlong official website

Advantages of Discrete ARM+FPGA Compared to ZYNQ SoC

Tronlong WeChat official account

【Long press to recognize the QR code to follow us】

Looking forward to your

sharing

likes

viewing

Leave a Comment

Your email address will not be published. Required fields are marked *