A Bug Related to TAG Numbers in Xilinx V7 690T PCIe IP Core Usage
1. Core Background: The “Extended Tag Field” Option of PCIe IP Core – When instantiating the Xilinx V7 series PCIe Endpoint (EP) IP core in the Vivado tool, you will encounter the configuration option “Extended Tag Field”, which is directly related to the bit width of the TAG number: – If this option is checked: … Read more