How to Use J-Link and Embedded Studio to Read and Write RISC-V Processor CSR
Introduction to CSR The Control and Status Registers (CSR) of the RISC-V architecture are used to configure or record the operational status of some processor cores. CSR registers are internal registers of the processor core, using a dedicated 12-bit address encoding space, with a maximum of 4096 available. Therefore, accessing CSR registers requires special instructions. … Read more
