*This guide covers the use of the MicroBlaze processor in embedded design, designs with memory IP cores, and reset and clock topologies in IP integrator. To obtain the full version of the “User Guide for Embedded Design with MicroBlaze Processor,”please scan the QR code at the end of the document to download it.
Overview of Device Tool Flow
The AMD Vivado™ tool provides a specific programming flow based on the processor.The Vivado IDE uses IP integrator along with a graphical connection screen to specify devices, select peripherals, and configure hardware settings.
You can use IP integrator to capture hardware platform information in XML format and export it, along with other data files, to develop designs for AMD processors.Various software design tools use XML to perform the following tasks.
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Create and configure Board Support Package (BSP) libraries
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Infer compiler options
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Program the Processor Logic (PL)
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Define JTAG settings
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Automatically perform other operations requiring hardware information
The AMD MicroBlaze™ embedded processor is a Reduced Instruction Set Computer (RISC) core optimized for implementation in AMD Field Programmable Gate Arrays (FPGAs and Adaptive SoCs).
To create an embedded MicroBlaze processor design, refer toChapter 2:Using the MicroBlaze Processor in Embedded Design to learn how to use IP integrator and other AMD tools. For more information about the processor, please refer to the “User Guide for Embedded Design with MicroBlaze Processor”
AMD provides design tools for developing and debugging software applications for AMD processors, including but not limited to:
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Software IDE
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GNU-based compiler toolchain
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Debugging tools
These tools support you in developing bare-metal applications without an operating system and applications for the open-source Linux operating system.
AMD provides integration of hardware design and software development, supporting the integration process down to the AMD Vitis™ software platform.Vitis is a standalone product available for download from the AMD website. For more information on how to use this tool, please refer to the “Vitis Unified Software Platform Documentation”.
Browse Content by Design Process
AMD Adaptive Computing documentation is organized by a set of standard design processes to help you find content relevant to your current development tasks.You can access the AMD Versal™ Adaptive SoC design processes on the design center page.You can also use the design process assistant to gain deeper insights into the design process and find content specific to your intended design requirements.This document covers the following design processes:
Embedded Software Development: Create a software platform based on the hardware platform and develop application code using embedded CPUs. Also covers XRT and compute graph APIs. Topics applicable to this design process in this document include:
Chapter 2: Using the MicroBlaze Processor in Embedded Design
Hardware, IP, and Platform Development: Create PL IP blocks for the hardware platform, create PL cores, perform functional simulation, and evaluate AMD Vivado™ timing closure, resource utilization, and power closure. Also involves developing hardware platforms for system integration. Topics applicable to this design process in this document include:
Chapter 3: Designs with Memory IP Cores
Chapter 4: Reset and Clock Topologies in IP Integrator
To obtain the full version of the “User Guide for Embedded Design with MicroBlaze Processor”
please scan the QR code to download
