Heterogeneous Computing (Big.LITTLE) Processors
During Intel’s 2021 Architecture Day event, the new generation of processors was first announced to utilize a heterogeneous core design (referred to as P-Core and E-Core by Intel) on the PC platform, similar to the ARM platform’s Big.LITTLE heterogeneous core mechanism. Intel named the “small core” as the Efficient-Core and the “big core” as the Performance-Core. The small cores are used for handling background tasks with low computational load to reduce energy consumption, while the big cores are used for foreground or high computational load tasks to ensure performance. Windows 11 was the first operating system to adapt to this architecture, implementing the corresponding task scheduling mechanism. Subsequently, the Linux kernel planned to adapt to this in version 5.16 and fix some anomalies. This series of processors is manufactured using Intel’s third-generation 10nm process and features two new core microarchitectures: the high-performance Golden Cove and the efficient Gracemont. Alder Lake will replace the previous Tiger Lake series processors. It was announced by Intel on October 27, 2021, and officially launched on November 4, 2021, with non-K series processors released on January 4, 2022.
Trends
With Intel and ARM successively launching Big.LITTLE processor products for different markets, the Big.LITTLE architecture has become a popular trend. In China, the Feiteng E2000 adopts a “two big and two small” four-core heterogeneous computing cluster design, and the new generation of processors planned by Loongson will also use a Big.LITTLE architecture design. Currently, general-purpose operating systems have designed specialized schedulers based on different uses and scenarios, but these systems have not optimized the real-time performance of Big.LITTLE scheduling. For example, in mobile computing, more consideration is given to battery life, leading to significant jitter in the real-time performance of critical tasks in Big.LITTLE systems. As of now, no commercial real-time operating system has been released that meets strong real-time requirements while supporting energy and computing scheduling for Big.LITTLE architectures; this situation will soon become history. Recently, Yihui released the SylixOS V3.1.1 kernel source code, which includes complete support for heterogeneous multi-computing cluster scheduling while meeting strong real-time computing requirements, making it the world’s first strong real-time system to support Big.LITTLE scheduling.
Implementation
SylixOS’s support for Big.LITTLE scheduling is divided into two parts: “Core Computing Cluster Affinity Scheduling” and “Computing-Aware Automatic Scheduling Adapter“. Simply put, the former supports the latter’s operation. “Core Computing Cluster Affinity Scheduling” implements controllable affinity scheduling between scheduled tasks and different computing cores; the “Computing-Aware Automatic Scheduling Adapter” is a kernel module that accurately measures each task’s usage and demand for computing power, dynamically allocating total CPU computing power in real-time, allowing applications to seamlessly use the Big.LITTLE architecture processor system.
Core Computing Cluster Affinity Scheduling
SylixOS provides each task with multiple modes of controllable affinity settings. Taking the two computing clusters of Big and Little cores as an example:
If a CPU has more than two computing clusters, for example, an ARM processor includes three heterogeneous computing clusters of “big, medium, and small”, SylixOS also supports similar methods: Prefer using the medium computing core and Only use the medium computing core.
The above scheduling affinity models can be flexibly set by users on the SylixOS operating system. SylixOS provides the following APIs for real-time changes to task Big.LITTLE scheduling modes:
#include <pthread_np.h>#define PTHREAD_HETRCC_NON_AFFINITY ...#define PTHREAD_HETRCC_WEAK_AFFINITY ...#define PTHREAD_HETRCC_STRONG_AFFINITY ...LW_API int pthread_sethetrcc_np(pthread_t thread, int mode, unsigned int cluster);LW_API int pthread_gethetrcc_np(pthread_t thread, int *mode, unsigned int *cluster);Privileged programs can fully control their affinity to CPU computing power, facilitating optimal program performance. Among them, PTHREAD_HETRCC_STRONG_AFFINITY type affinity can be inherited by its child threads. For example, if a task uses OpenMP to design parallel algorithms, this method can be used to ensure that these parallel child threads run on strong computing cores for optimal computational performance.
The cluster parameter specifies different computing clusters, numbered from 0 onwards, with lower numbers indicating lower computing power. The following API can be used to obtain the current heterogeneous computing cluster status of the processor:
#include <unistd.h>#define _SC_HETRCC_CONF ...#define _SC_HETRCC_ONLN ...LW_API long sysconf(int name);sysconf(_SC_HETRCC_CONF) returns the number of computing clusters in the system. For example, a Big.LITTLE processor with two computing clusters will return 2, while sysconf(_SC_HETRCC_ONLN) returns the number of online (active) computing clusters in the system.
SylixOS provides standard interfaces for specifying CPU affinity settings while also offering computing cluster affinity:
#include <pthread_np.h>#define CPU_SET(n, p) ...#define CPU_CLR(n, p) ...#define CPU_ISSET(n, p) ...#define CPU_ZERO(p) ...LW_API int pthread_setaffinity_np(pthread_t thread, size_t setsize, const cpu_set_t *set);LW_API int pthread_getaffinity_np(pthread_t thread, size_t setsize, cpu_set_t *set);It should be noted that pthread_setaffinity_np has a higher priority than pthread_sethetrcc_np . If a task has both computing cluster affinity settings and CPU core affinity settings, SylixOS will perform CPU core affinity scheduling according to the settings specified by pthread_setaffinity_np and ignore the computing cluster affinity settings.
To meet the strong real-time scheduling requirements of critical tasks, SylixOS also provides the ability to specify that CPU cores only run tasks with affinity settings (not run tasks with free scheduling attributes). This ensures that critical real-time tasks can receive immediate responses from specified CPU cores at any time:
#include <pthread_np.h>LW_API int sched_cpuaffinity_set_np(size_t setsize, const cpu_set_t *set);LW_API int sched_cpuaffinity_get_np(size_t setsize, cpu_set_t *set);The above APIs are only effective for tasks with pthread_setaffinity_np affinity and are ineffective for pthread_sethetrcc_np . User applications can appropriately use the combination of scheduling logic provided by these APIs to achieve precise control over CPU core computing scheduling, better leveraging the controllable strong real-time characteristics of the SylixOS system. The above algorithms are designed with a time complexity of O(1), ensuring good time determinism.
Characteristics: Operating systems like Windows and Linux use task types and their priorities as important parameters for affinity scheduling strategies. In contrast, SylixOS adopts a different design philosophy. SylixOS believes that task priority and computing power demand are two dimensions of requirements. Priority represents the urgency of a task; urgent tasks do not necessarily require strong computing power, while tasks that require strong computing power, such as AI, multimedia, and 3D computation tasks, often do not have high real-time response requirements. Therefore, the primary principle of SylixOS’s Big.LITTLE scheduling remains consistent with real-time system requirements: priority-based preemptive scheduling, while ensuring that tasks with different computing power demands run on suitable processor cores.
Computing-Aware Automatic Scheduling Adapter
The “Core Computing Cluster Affinity Scheduling” described above requires users to manually adjust task computing affinities, while the “Computing-Aware Automatic Scheduling Adapter” provided by SylixOS offers users fully automated dynamic computing scheduling capabilities, allowing various applications to run seamlessly on the Big.LITTLE architecture.
The basic principles of the “Computing-Aware Automatic Scheduling Adapter” are as follows:
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Do not compromise real-time performance: Automatic scheduling does not impose core restrictions and does not compromise too much on power consumption, ensuring that high-priority tasks have suitable CPU cores available.
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Avoid aggressive migration: Computing awareness and migration progress gradually, avoiding multi-computing cluster turbulence, and striving to maintain CPU core cache warmth.
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Avoid “small cores struggling while big cores watch”: The automatic scheduler implements a “league promotion and relegation” algorithm, ensuring that when the utilization of low computing clusters reaches its limit, the errors caused by computing threshold scheduling are mitigated.
Use the following command to register the “Computing-Aware Automatic Scheduling Adapter”:
> insmod /lib/modules/xhcesa.koThe xhcesa.ko module will dynamically measure the actual computing power of each CPU computing cluster during initialization. Users can view the computing power and physical computing topology of the CPU in the /proc/kernel/cpu_hetrcc file. For example:
> cat /proc/kernel/cpu_hetrccCPU ID HETRCC COMPOW ACTIVE------ ------ -------- ------ 0 0 400 YES 1 0 400 YES 2 1 810 YES 3 1 810 YESThe above content indicates that CPU core 0 and core 1 belong to computing cluster 0, with a computing power of 400, while CPU core 2 and core 3 belong to computing cluster 1, with a computing power of 810.If users believe that the computing power ratios measured by xhcesa.ko are inaccurate, they can use the following environment variables to precisely label the computing power indicators of each computing cluster before registering this kernel module. For example, if a processor has two computing clusters, with computing cluster 0 having a computing power of 400 and cluster 1 having a computing power of 700, the following settings can be made:
> HETRCC_COMPOW=400,700Note: The computing power label for each CPU computing cluster must not exceed 1024, and settings can be proportionally reduced.
Once the xhcesa.ko kernel module is registered, the computing-aware automatic scheduling will automatically begin working, and real-time operational status can be viewed through the /proc/kernel/hetrcc file:
> cat /proc/kernel/hetrcc NAME TID PID PRI CPU HETRCC AFFINITY---------------- ------- ----- --- --- ------ --------app 4010031 2 200 8 2 WEAKapp 4010032 3 200 11 2 WEAKapp 4010033 4 200 10 2 WEAKThe above content indicates that there are currently three tasks set to computing cluster 2 with WEAK affinity. When the CPU cores of computing cluster 2 have the opportunity to run these three tasks, they will be prioritized to run on the CPU cores of computing cluster 2. However, WEAK affinity is merely a preferential affinity; if these three tasks are ready and computing cluster 2 does not have execution conditions (for example, if a higher-priority task is running), SylixOS will schedule these three tasks on the small core computing cluster based on priority preemption principles to ensure real-time performance.
As the program runs, the “Computing-Aware Automatic Scheduling Adapter” will measure the CPU computing usage of tasks in real-time and dynamically adjust based on relevant algorithms. The /proc/kernel/hetrcc file will reflect the current computing scheduling status. It should be noted that to avoid conflicts between the “Computing-Aware Automatic Scheduling Adapter” and user-designed scheduling logic, and to ensure the real-time performance of each task, the current automatic scheduling strategy will only use WEAK type affinity. For other user-known strong computing demand tasks, users can use APIs to set STRONG type strong affinity or use the hetrcc command to set:
> hetrcc tid weak|strong clusterSMT Synchronized Multithreading (HT Hyper-Threading)
The SylixOS scheduler can dynamically sense the physical CPU topology of processors with hyper-threading capabilities and perform related optimized scheduling, intelligently allocating tasks to physical cores for processing, thereby improving task real-time performance. The SylixOS hyper-threading optimized scheduler can work in conjunction with the SylixOS Big.LITTLE dynamic scheduler to better support real-time computations on large and complex CPUs.
Users can view the current physical core topology of the CPU in the /proc/smp file:
> cat /proc/smpLOGIC CPU PHYSICAL CPU NON IDLE STATUS CURRENT THREAD MAX NESTING IPI VECTOR--------- ------------ -------- ------ -------------- ----------- ---------- 0 0 0 ACTIVE t_idle0 1 126 1 0 0 ACTIVE t_idle1 1 127 2 1 0 ACTIVE t_idle2 1 128 3 1 0 ACTIVE t_idle3 1 129 4 2 0 ACTIVE t_idle4 1 130 5 2 0 ACTIVE t_idle5 1 131 6 3 0 ACTIVE t_idle6 1 132 7 3 0 ACTIVE t_idle7 1 133 8 4 0 ACTIVE t_idle8 1 134 9 4 0 ACTIVE t_idle9 1 135 10 5 0 ACTIVE t_idle10 1 136 11 5 0 ACTIVE t_idle11 1 137 12 6 0 ACTIVE t_idle12 1 138 13 6 0 ACTIVE t_idle13 1 139 14 7 0 ACTIVE t_idle14 1 140 15 7 0 ACTIVE t_idle15 1 141 16 8 0 ACTIVE t_idle16 1 142 17 9 0 ACTIVE t_idle17 1 143 18 10 0 ACTIVE t_idle18 1 144 19 11 1 ACTIVE t_tshell 1 145For example, with the 12th Gen Intel® Core™ i7-12700KF, SylixOS automatically detects that this processor has 0 ~ 11 twelve physical cores, with 0 ~ 7 each physical core containing two logical processor cores, while 8 ~ 11 each physical core contains only one logical processor, totaling 20 logical processor cores. The SylixOS system startup parameter smt=yes can enable SMT architecture processor scheduling optimization.
This processor is an Intel Big.LITTLE processor, and the computing power of each computing cluster is as follows:
> cat /proc/kernel/cpu_hetrccCPU ID HETRCC COMPOW ACTIVE------ ------ -------- ------ 0 1 840 YES 1 1 840 YES 2 1 840 YES 3 1 840 YES 4 1 840 YES 5 1 840 YES 6 1 840 YES 7 1 840 YES 8 1 840 YES 9 1 840 YES 10 1 840 YES 11 1 840 YES 12 1 840 YES 13 1 840 YES 14 1 840 YES 15 1 840 YES 16 0 290 YES 17 0 290 YES 18 0 290 YES 19 0 290 YESNUMA Architecture Multi-Core Processors
NUMA (Non-Uniform Memory Access) architecture is a memory organization method for multi-processor systems. In this architecture, processors are assigned to different nodes, each with its own local memory. Processors can access both local memory and memory from other nodes, but accessing local memory is faster than accessing memory from other nodes.
For example, with the Feiteng FT-S2500 64-core 8-node NUMA architecture processor, the performance of accessing remote memory will decrease by one-third compared to accessing nearby memory. If not handled specially, this can severely impact program execution speed.
Recently, Yihui released SylixOS version 3.2.7, which began supporting NUMA architecture processors. In this version, SylixOS can support tightly coupling specified user tasks to designated NUMA nodes while also prioritizing tightly coupled tasks to use the physical memory of the NUMA node, ensuring that both programs and data preferentially use the nearby memory of the NUMA node, thereby improving memory access efficiency and significantly reducing the likelihood of remote memory access. Thus, SylixOS can maintain both strong real-time performance and high throughput on NUMA architecture processors.
> numago node_id program ...argsUsing the above command, a process can be started to run on a specified NUMA node, which is simple and easy to use.
Conclusion
After years of development, SylixOS has robust support for various architecture processors and advanced processor features, meeting the real-time requirements of critical tasks while fully leveraging processor computing power. The processor architectures currently supported by SylixOS include: ARM32/64, x86/64, MIPS32/64, LoongArch32/64, RISCV32/64, SPARC, PowerPC, C-SKY, Alpha, DSP. SylixOS has now become one of the most powerful large real-time operating systems globally, widely applied across various industries, leading the domestic real-time operating system field.
This time, for heterogeneous computing Big.LITTLE processors, SylixOS provides flexible and efficient schedulers and scheduling strategies, allowing users to manage manually or use the “Computing-Aware Automatic Scheduling Adapter” for automatic scheduling, offering convenience and flexibility with strong user control. This enables users to easily tackle the challenges posed by various complex demands.
* The above technologies and interfaces have been patented by Yihui. We ask competitors to respect the relevant intellectual property rights and create a good market atmosphere together.
