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Strong collaboration
Recently, the RISC-V Open Chip Industry Innovation Center and Suzhou Huaxin Microelectronics Co., Ltd. officially signed a business agreement to initiate technical research and development cooperation. In this collaboration, the Innovation Center has licensed the RISC-V CRV0 IP, which was independently developed and designed by Suzhou Guoxin Technology Co., Ltd. Huaxin Micro will focus on the smart home appliances and consumer electronics sectors, fully exploring and leveraging the application advantages of the RISC-V CRV0 IP to accelerate innovation in RISC-V chip technology.
This licensing collaboration between the Innovation Center and Huaxin Micro represents a significant expansion of RISC-V technology applications in the home appliance and consumer electronics fields. Both parties will leverage their resource aggregation advantages to strengthen technical exchanges and cooperation, jointly tackling key challenges in the application of RISC-V technology.
Huaxin Micro
Founded in 2000, Huaxin Micro is dedicated to the design and development of digital and mixed-signal chips in areas such as MCUs, RF, sensors, and infrared remote controls, primarily serving the consumer and industrial terminal markets, especially promoting chip applications in the field of smart control. The company has undertaken several key R&D tasks, including national key technology projects, the National Torch Program, Jiangsu Province’s special funds for technology transfer, and the Suzhou-Tsinghua Innovation Leading Action Special Project, accumulating a solid technical foundation and extensive market resources over many years of development.
Guoxin Technology
Guoxin Technology focuses on the research and development and industrial application of domestically produced, controllable embedded CPU technology. It has established a high-performance, low-power 32-bit RISC embedded CPU technology with independent intellectual property rights, having a solid foundation in the RISC-V field. The licensed CRV0 IP is a 32-bit RISC-V CPU core developed for low-power IoT applications, benchmarked against the Cortex-M0. The CRV0 CPU core implements the RV32EMC instruction set, with a pipeline architecture that adopts a sequential, single-issue, two-stage pipeline implementation, achieving a Dhrystone performance of 1.06 DMIPS/MHz.
Further ReadingThe RISC-V Open Chip Industry Innovation Center was established in May 2025, aiming to gather innovative resources from both domestic and international sources, focusing on four aspects: technical breakthroughs, application promotion, scenario implementation, and ecosystem construction, with a focus on areas such as artificial intelligence, automotive electronics, information security, and smart home appliances, to promote technological innovation and ecosystem development in the RISC-V chip industry.
The Innovation Center is based on RISC-V CPU series cores, AI NPU series cores, and SOC chip design platforms for applications in artificial intelligence, automotive electronics, information security, and smart home appliances. On one hand, it provides strong customized design capabilities to help enterprises achieve rapid, customized chip design and mass production, enhancing product and enterprise competitiveness; on the other hand, it aims to create benchmark products to realize large-scale applications of RISC-V chips, transitioning RISC-V from technology to product and then to ecosystem. By promoting deep applications in key areas, the Innovation Center hopes to provide richer practical cases and application data for the RISC-V industry ecosystem, attracting more upstream and downstream enterprises to participate in the construction of the RISC-V industry ecosystem, further enhancing the market share and influence of the RISC-V architecture in both domestic and global chip markets.