According to a report from Electronic Enthusiasts (by Li Cheng), in recent years, the rapid development of underlying technologies such as 5G, IoT, and AI has completely activated the entire consumer electronics market, leading to a strong momentum in the wearable device market. Data from IDC shows that in the second quarter of 2021, global shipments of wearable devices reached 114.2 million units, a year-on-year increase of 32.3%.
Currently, wearable devices in the market mainly include smartwatches, smart bands, true wireless earbuds, and smart glasses. Their common characteristics are small size, high system complexity, and challenges in ensuring large battery capacity while meeting increased power consumption requirements. Depending on the size of the device, battery capacities generally range from several dozen milliamps to several hundred milliamps. Therefore, the conversion efficiency requirements for power management chips in wearable devices are constantly increasing to meet the demand for lower power consumption and longer battery life.
Key Design Aspects of Power Management Chips for Wearable Devices
Multifunctionality: Many devices are developing towards intelligence, with new functions being continuously added, leading to increased system power consumption. The current demand for power management chips is no longer limited to monitoring current, voltage, and temperature; new features such as power diagnostics and controllable current and voltage output are necessary to satisfy more intelligent wearable devices.
Miniaturization: Due to the typically small size of wearable devices, to meet long battery life requirements, the battery has been designed to maximize capacity. After accounting for battery space, the internal space of the device is limited. Therefore, power management chips should minimize the number of external circuit components during design, favoring miniaturized packaging to reduce space occupancy.
Low Power Consumption and High Conversion Efficiency: As electronic devices gain more functions, power consumption also increases. Coupled with the issue of short battery life due to small battery capacity, only by improving conversion efficiency and reducing power consumption can these problems be alleviated.
In summary, to enable wearable devices to operate for extended periods, power management chips should be designed for high efficiency and compact size, reducing power consumption and space occupancy to meet mainstream market demands.
ADI’s Ultra-Compact Wearable PMIC
ADI is the second-largest analog chip supplier globally, following TI, and continues to innovate in the battery management chip sector. Power management chips are the core of electronic devices, directly affecting the entire power supply system and product performance. Recently, ADI launched the new power management chip MAX77659 for wearable devices.
(MAX77659 Circuit Topology Source: Maxim Official Website)
MAX77659 is a highly integrated single-inductor multiple-output (SIMO) power management chip characterized by efficiency and low power consumption. It can also be applied in charging schemes, achieving nearly four times the charging speed compared to traditional rates. This chip includes a dual-input SIMO buck-boost controller, providing one charging channel and three independently programmable channels, all sharing a single inductor to reduce the overall size of the chip. The 100mA LDO can modulate ripple and also serve as a load switch to disconnect from external modules in idle states to reduce power consumption. The chip also integrates two GPIO ports supporting input and output, along with an analog multiplexer for transmitting multiple internal voltage and current signals externally, facilitating real-time monitoring by external DACs. The bidirectional I2C serial interface allows for monitoring and configuring the device’s status, while the internal on/off controller provides a controlled startup sequence for the monitoring module and performs monitoring when the module is enabled.
With regulator control, MAX77659 achieves a maximum efficiency of up to 91% under full load, and a static current of 5μA under light load. The chip can also reduce voltage drop and thermal loss through margin control. MAX77659 uses WLP packaging technology, with dimensions of 2.55mm*2.37mm*0.5mm, making it sufficiently compact for use in space-constrained wearable devices. According to ADI, MAX77659 powers multiple supply rails using a single inductor, saving 60% of components and reducing the solution size by 50%.
NXP Low-Power Compact PF1550 PMIC
NXP has been working on the wearable device industry layout for many years, with products in the wearable field covering MCUs, application processors, sensors, PMICs, etc., continuously developing towards low energy consumption, intelligence, and miniaturization. NXP has also designed dedicated PMICs PF1550/PF1510 for i.MX 6UL/i.MX 7ULP processors used in wearable devices.
(PF1550 Principle Block Diagram Source: NXP Official Website)
PF1550 is a low-power power management chip from NXP for wearable devices. The PF1550 chip integrates a single-cell lithium battery charging module with a voltage of 1A and multiple power outputs, including three low-dropout linear regulator (LDO) circuits, three buck circuits, one RTC circuit, and one DDR reference voltage circuit. The eight output circuits can deliver a maximum output power of 18W, meeting the power demands of wearable devices. Additionally, it can configure OTP to adjust power-up and power-down sequencing and voltage.
PF1550 supports DVS functionality, with a minimum static current of 450nA, and the buck circuit can output a maximum current of 1A. The chip also supports PFM, ASP, and PWM multi-mode switching, achieving a single-channel maximum efficiency of up to 90%. VSNVS can provide a 3V 2mA power supply for the RTC. PF1550 includes a charging module that can input 5V/1A power via USB to charge the lithium battery. The charging unit can also monitor battery temperature and analyze the results to determine whether to modulate the charging current and voltage. The chip comes in a QFN package, measuring 5mm*5mm, which is twice the size of ADI’s MAX77659.
TI TPS65023B Compact PMIC
(TPS65023B Principle Framework Diagram Source: TI Official Website)
TPS65023B is a power management chip designed by TI for use with the i.MX7 processor, applicable in multi-channel, single-cell battery supply schemes. The chip integrates three buck converters, allowing for real-time voltage control via a serial interface to meet the system’s low power consumption needs. In light load conditions, it can autonomously switch to low-power mode, achieving maximum efficiency across a wide load range.
TPS65023B also integrates two 200mA LDO stabilizers, which can modulate the output voltages of the two LDOs via the DEFLOD port to provide different voltages. The chip can achieve a maximum efficiency of 95% and operates in an environment temperature range of -40℃ to 85℃, using a 40-pin WQFN package with dimensions of 5.0mm*5.0mm. The TPS65023B power management chip can be used in wearable devices, digital media players, digital cameras, and more.
Power management chips are akin to the “heart” of electronic devices, with their performance directly linked to the performance and reliability of the devices. The future of wearable devices is promising, with low power consumption, high efficiency, high integration, and miniaturization becoming the main trends in the development of power management chips.
Disclaimer: This article is originally from Electronic Enthusiasts, please indicate the source above when reprinting. For group discussions, please add WeChat elecfans999, for submission of interview requests, please email [email protected].
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