CPU manufacturers generally launch a series of self-developed motherboards when introducing new CPUs, targeting various niche markets, to verify the CPU’s functionality and serve as a reference for downstream manufacturers to design motherboards and features. These motherboards have different names across manufacturers, and even different business units within the same manufacturer may use different terms, such as CRB: Customer Reference Board, RVP: Reference Validation Platform, SDP: System Development Platform (Intel’s CRB and SDP sometimes target different customers). ARM server CPU Neoverse series also has similar reference boards: N1 SDP [1] (hereinafter referred to as N1SDP). As the pioneering ARM server reference platform Neoverse, although the N1 CPU and N1SDP have been released for over three years, due to the lack of actual SDP for subsequent N2 and V2, which transitioned to a virtual platform FVP [2] (Fixed Virtual Platform), N1SDP still serves as a valuable reference and demonstration platform.
Introduction to N1SDP
The system block diagram is as follows:
Source: Reference Material 1
The actual motherboard looks like this:
Source: Reference Material 1
Source: Reference Material 1
N1SDP, as a reference platform, has some limitations but also many highlights:
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ARM N1 CPU is extremely flexible to build. The “CPU Tile” serves as the basic unit (actually a Cluster), with two N1 Cores inside each Tile. Multiple Tiles can be combined to form a Super Tile, which connects with an on-chip mesh network, along with other Super Tiles and IPs (such as PCIe, Memory Controller, etc.) to form a complete CPU. Theoretically, the N1 CPU can contain 64 to 128 N1 Cores, and some manufacturers have actually created such a number of Cores (e.g., Ampere). Multi-core or even many-core is an effective means for server platforms to improve performance, but unfortunately, the N1SDP, built on ARM’s TSMC 7nm foundry SoC, only has two Tiles, meaning only 4 N1 Cores (3GHz), which is not yet up to par for server CPUs, possibly just for demonstration and verification purposes. This results in a very “delicate” cooling system paired with the N1SDP, which is even inferior to typical desktop cooling designs.
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Servers generally require multi-socket designs, but N1SDP only provides a single-socket SoC. Fortunately, the motherboard offers a CCIX (Cache-Coherent Interconnect for Accelerators) compatible PCI Express ×16 Gen 4 slot, allowing two N1SDPs to be connected into a dual-socket system to verify the software and hardware protocol stack. This is somewhat similar to the recent Intel server CRB module design, which can combine two dual-socket CRB module boards into a four-socket CRB. When CCIX is connected with N1SDP, it is essential to connect the C2C (Chip to Chip) signals of both SDPs, which are located on the backplane.
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The motherboard includes a Cortex-M4 as the MCC (Motherboard Configuration Controller), another Cortex-M4 as the PCC (Platform Controller Chip), and an IOFPGA for I/O ports. It provides a low-resolution display controller connected to the HDMI port on the backplane. Unfortunately, it lacks UEFI GOP drivers, causing some inconvenience.
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As a reference platform, a significant highlight of N1SDP is the open-sourcing of almost all firmware: the SCP (System Control Processor) firmware controlling Power, thermal, and system control; the MCP (management control processor) firmware supporting RAS; ATF firmware; and UEFI firmware. This complete suite is particularly suitable for chip companies’ basic software departments as a reference.
Introduction to N1SDP UEFI Firmware
The open-source UEFI firmware of N1SDP can pass ARM SystemReady certification. An interesting aspect is that both it and the ATF firmware are located on the MicroSD card on the motherboard, making replacements very flexible for DIY enthusiasts. The downside is that the interface and functionality are quite simple, lacking drivers for network cards and graphics cards, serving merely as a reference demonstration. This is where BIOS vendors can make improvements. Baidao has added a graphical BIOS on top of it:
With the help of the x86 Emulator (an emulator in the BIOS, a magical tool to solve the lack of ARM and RISC-V board ecosystems: X86 Emulator), support for external graphics card GOP drivers and NIC cards has been added. It also includes complete product-level features.
Conclusion
Many people only believe in tangible things. The N1SDP is a real hardware machine, and this sense of reliability makes it seem like the best choice for the Neoverse series platform. However, the $10,000 price tag on the official website is enough to deter most potential customers who only want to try it out. Perhaps at this time, the N2 and V2 FVPs become more appealing, as they are free, and the N2 is stronger and can be easily integrated into various CI/CD environments. So, next time, let’s try out the N2 FVP together!
References
[1] N1SDP Homepage: https://developer.arm.com/Tools%20and%20Software/Neoverse%20N1%20SDP
[2] ARM FVPs: https://developer.arm.com/downloads/-/arm-ecosystem-fvps
