Introduction
SPI, short for Serial Peripheral Interface, is a high-speed interface technology that supports full-duplex synchronous communication. The communication rate can reach several megabits to tens of megabits.
1. Four-Wire SPI
The commonly used SPI typically consists of four lines:
SDO/MOSI: Master device data output, slave device data input, such as when the master reads a command;
SDI/MISO: Master device data input, slave device data output, such as when the slave returns data;
SCLK: Clock signal generated by the master device for data synchronization;
CS/SS: Slave device enable signal controlled by the master device to select which slave to communicate with;
The four-wire configuration is a full-duplex communication method.
ST’s MCU configuration for four-wire SPI:
spi.c
Conclusion: When we set hspi1.Init.Direction = SPI_DIRECTION_2LINE in our program, HAL_SPI_TransmitReceive can send and receive simultaneously.
2. Three-Wire SPI
However, there is another SPI communication method that uses three wires to reduce the number of lines and pins. Many people online believe that the three-wire method does not have a CS chip select, which is incorrect. The true three-wire SPI communication mode refers to the communication method where SDO/MOSI and SDI/MISO share a single bus, using half-duplex communication. This brings us to the definitions of full-duplex and half-duplex. Full-duplex allows data to be transmitted simultaneously in both directions, effectively combining two simplex communication methods. Full-duplex means that bidirectional signal transmission can occur simultaneously.
Half-duplex means that data can be transmitted in both directions on a single signal carrier, but not simultaneously.
ST’s MCU configuration for three-wire SPI:
SPI.c
Conclusion: When we set hspi1.Init.Direction = SPI_DIRECTION_1LINE in our program, using HAL_SPI_Transmit will configure the lower layer to only send. Using HAL_SPI_Receive will configure the lower layer to only receive.
Specifically control the BIDIMODE bit.
3. Two-Wire SPI
Since SDO/MOSI and SDI/MISO share a single bus, they cannot transmit simultaneously, which is known as half-duplex communication. During communication, the CS/SS line is also required for chip selection; it is not that there is no CS/SS. The claim that the CS/SS line is unnecessary refers to the case where there is one master and one slave on the SPI line, in which case the CS/SS line can be omitted because there is only one slave. Thus, the slave’s CS/SS can be set to a constant selected state. It is not permissible to pull CS/SS high to indicate the end of communication; if data errors occur, the consequences can be severe, leading to persistent errors. This three-wire configuration indeed consists of three lines, but it differs from the half-duplex three-wire SPI communication mode. Many ICs that specify the use of a three-wire configuration generally refer to half-duplex mode.
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Original link:
https://blog.csdn.net/qq_41328470/article/details/135354393