Cortex Authority Manual - Low Power and System Control Features

With the proliferation of Internet of Things (IoT) devices and portable electronics, low power design has become increasingly important. The ARM Cortex-M series processors offer various low power features and system control mechanisms to help developers optimize power consumption and extend battery life. Below is a detailed introduction:

Dynamic Current and Sleep Current

Dynamic Current: Typically expressed in microamperes per megahertz (µA/MHz), it reflects the power consumption of the processor during operation. Dynamic current is closely related to the processor’s clock frequency and workload.
Sleep Current: Represents the power consumption of the processor in sleep mode, usually very low, measured in microamperes (µA). In sleep mode, the processor stops most activities, retaining only basic clock and state retention functions.

Low Power Requirements

Dynamic Current: Reducing dynamic current can be achieved by lowering the clock frequency, optimizing code to reduce execution time, etc.
Sleep Mode Current: Choose a low power sleep mode and minimize wake-up time as much as possible.
Energy Efficiency: Reduce the processor’s active time and power consumption by optimizing algorithms and code structure.
Wake-up Latency: Minimize the waiting time during the wake-up process to quickly return to operational status.

System Control Block’s System Control Register (SCB->SCR)

System Control Register (SCR): Used to configure the system’s low power modes, including sleep mode and deep sleep mode. SCR can only be accessed in privileged state, ensuring system stability and security. Developers can select the method of entering sleep mode by setting bits in the SCR.

Entering and Exiting Sleep Mode

Entering Sleep Mode:

Use WFI (Wait For Interrupt) and WFE (Wait For Event) instructions to put the processor into sleep mode.
Before entering sleep mode, it is usually necessary to set the PRIMASK register to mask interrupts, switch the clock source to a low power clock (such as a quartz crystal clock), and turn off the phase-locked loop (PLL) to save power.

Exiting Sleep Mode:

External interrupts (such as NMI) or the system tick timer (SysTick) can wake up the processor.
After waking up, the software needs to reconfigure the clock system, enable the PLL, and clear PRIMASK to restore interrupt handling.

Wake-up Interrupt Controller (WIC)

WIC Features: The WIC can operate without a clock signal, ensuring that it can still respond to interrupts in deep sleep mode. The WIC has no programmable registers; interrupt masking information is sent from the NVIC to the WIC before entering deep sleep mode.

Event Communication Interface

Peripheral and Processor Communication: Allows peripherals to generate events while the processor is in sleep mode, waking up the processor.
Multiprocessor Communication: Supports task synchronization in multiprocessor systems.
DMA Operations: The DMA controller can generate events after completing data transfers, waking up the processor.

Low Power Practices in Programming

Example Code:

int main(void){    setup_Io();    setup_NVIC();    SCB->SCR |= 1 << 1; // Enable deep sleep mode    while (1)    {        __WFI(); // Enter sleep mode    }}

Developing Low Power Applications

Select Suitable SRAM and Flash: Choose low power memory components.
Select Appropriate Clock Frequency: Choose an appropriate clock frequency based on application requirements to avoid excessive power consumption.
Turn Off Unused Clock Signals: Use the clock control unit to turn off unused peripheral clocks.
Power Supply Voltage Design: Optimize power supply voltage to reduce power consumption.
Port Configuration: Configure unused GPIOs as input mode to reduce leakage current.
Reduce Active Cycle: Optimize code to reduce the processor’s active time.
Minimize Sleep Mode Current: Reduce current consumption in sleep mode through hardware design.

SysTick Timer

Function: SysTick is a 24-bit down counter used to generate periodic interrupts, suitable for the operating system’s clock tick.
Configuration Example:

SysTick_Config(SystemCoreClock / 1000); // Generate 1kHz interrupt frequency

Custom Configuration:

SysTick->CTRL = 0; // Disable SysTickSysTick->LOAD = 0xFF; // Set reload value to 255SysTick->VAL = 0; // Clear current valueSysTick->CTRL = 5; // Enable SysTick and use processor clockwhile ((SysTick->CTRL & 0x00010000) == 0); // Wait for count flag to be setSysTick->CTRL = 0; // Disable SysTick

Reset Mechanism

NVIC_SystemReset Function: Used to trigger a system reset.

void NVIC_SystemReset(void){    __DMB(); // Ensure all memory operations are complete    SCB->AIRCR = 0x05FA0004 | (SCB->AIRCR & 0x700); // Trigger reset    while (1); // Wait for reset to complete}

Cortex Authority Manual – Low Power and System Control Features