Abstract: In the face of the chip definition dilemma brought about by the uncertainty of AI scenarios, Rockchip provided a breakthrough answer at the 2025 Developer Conference: a modular design of “main chip + co-processor”.
This “building block” approach allows terminal manufacturers to flexibly stack computing power as needed, effectively responding to the demands of various industries and avoiding excessive spending for unknown scenarios.
Behind the “blocks”, ecological collaboration is the key support. In addition to collaborating with OS, algorithms, design companies, and terminal partners across the entire industry chain, Rockchip is also deeply cultivating software and hardware capabilities in automotive, robotics, vision, audio, and various industry applications, constructing a full-stack solution matrix covering high, medium, and low-end, significantly lowering the threshold for AI productization.
As a result, a new standard for AIoT chips is quietly being established: flexibility and deep scene adaptation have become core, as AI begins to accelerate industry competition, all traditional products need to rethink their existence forms and value logic.
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Below is the main text:
The era of AI is roaring in, and all industries are welcoming new opportunities, but inevitably rethinking the way products are defined.
Behind the bustling semiconductor sector and AIoT chips, chip designers have always faced a core dilemma: how to define the right chip when the AI scenarios are still uncertain?
This decision cannot misjudge the future mainstream AI scenarios, leading to a mismatch between the designed chip parameters and the actual explosive demand, nor can it wait for standards to be established, missing market opportunities. Therefore, everyone is both afraid of missing out and afraid of making the wrong investment.
At the Rockchip Developer Conference on July 17-18 this year, many practitioners likely came with this question, and this conference themed “AIoT Model Innovation Redefining Products” indeed painted a clearer picture of the new layout of visual chips in “edge-cloud collaboration”.
01
Rethinking User Needs
In the chip industry, simply pursuing predictions of customer scenarios is often a gamble. Based on this backdrop, most companies’ simplest solution is to roll out the process. However, in the rapidly changing AI era, the performance of a single general-purpose chip often fails to meet the deep needs of various industries.
As Rockchip Chairman Li Min stated at the conference, the industry urgently needs a complete platform that can integrate underlying hardware, algorithm models, and upper-layer applications, while traditional products are worth being reshaped by AI to enhance product capabilities and better meet user needs.
In this context, the new idea presented at the Rockchip conference is to transcend traditional SoC suppliers and accelerate the transformation into a core enabler of multi-computing power and multi-layer full-stack solutions. In terms of products, it provides a “main chip + co-processor” solution. This means that vertical fields such as automotive electronics, industrial applications, conference office, and education scenarios will have more functional upgrade space.
The core of this new chip design philosophy is: modular, combinable, and scene-adaptive.
Specifically, high-performance main control SoCs like RK3588 and RK3688 will be freely combined with co-processors that provide specialized capabilities.
For the corresponding edge AI co-processors, Rockchip has launched a new generation of low-power, high-efficiency RK1820/RK1828, which features high computing power and high bandwidth, designed for large models on the edge, and can stack one or more RK182X co-processors based on terminal computing power needs.
This combination can cover various aspects such as automotive, robotics, industrial, security monitoring, and real-time voice transcription, speaker recognition in conference scenarios, as well as real-time voice assessment and oral guidance in educational scenarios. For example, combining the main control with visual and audio co-processors can quickly create a next-generation conference terminal with functions such as speaker tracking, real-time voice transcription, and AI intelligent noise reduction, while perfectly balancing privacy security and development costs.
The new flagship chip RK3688 was heavily introduced at the conference, boasting powerful performance with an 8-core A730 (ARM V9.3 instruction set) + 4-core A530 architecture, GPU using the latest Magic architecture, computing power >2T Flops, built-in 32T self-developed NPU, supporting LPDDR5 eight-channel (2GB bandwidth), applicable to smart cockpits, edge terminal high-performance computing platforms, robotic computing, and ARM-based PC mobile computing scenarios.
Also introduced was the sister chip RK3668, designed with a 10-core architecture, 5-6nm process, memory options of LPDDR5, LPDDR5x, and LPDDR6, 4 channels, with bandwidth up to 100GBps, targeting the mid-range market, balancing performance, power consumption, and cost.
Now, through the “main chip + co-processor” solution, terminal manufacturers can purchase computing power as needed, without overpaying for uncertain future demands.
02
Ecology is the Key Support
Of course, for enterprises, even if they can think of the “main chip + co-processor” solution, merely having building blocks is not enough. To truly realize the value of these chip modules, a complete and powerful ecological support system is needed, making it crucial to find the right partners and direction.
To achieve this, the first step is to expand the ecological scope of their products. At this conference, Rockchip had 11 major application exhibition areas, including new product exhibition area, automotive electronics, robotics, commercial applications, office and conference, industry applications, machine vision, consumer electronics, operators, audio technology, and industry development boards, with each section actively embracing more emerging scenarios.
In addition, the company is also launching new product optimizations and enhancements in traditional advantageous areas, deeply cultivating visual and audio capabilities to empower more partners to quickly land their scenarios.
For example, the new generation 4K visual chip RV1126B targets security front-end and back-end and industry visual applications, supporting a series of Rockchip’s core self-developed algorithms including AI-ISP, black light full color, AOV low power fast start, intelligent encoding, motion blur removal, digital anti-shake, etc. Notably, RV1126B supports LLM VLM operation, and the actual on-site demonstration showed good performance in scene analysis, making it a highly cost-effective edge chip.
The new generation audio processor RK2116 features a high-performance dual-core DSP and large-capacity SRAM, with 8 sets of SAI audio interfaces, multiple audio-specific IOs, and flexible audio input-output configurations, supporting self-developed ECNR, AVAS, virtual surround, and home theater soundbar solutions.
This provides excellent AI noise reduction and echo cancellation capabilities for conference headsets, smart speakers, classroom microphones, and learning machines, while also exploring advanced audio interactions such as voice wake-up, emotion recognition, and real-time translation.
In terms of chip product matrix, Rockchip provides developers with great flexibility by constructing a full range of high-end, mid-range, and entry-level chip layouts, offering flexible computing power options for conference office and education products, achieving an optimal balance between cost and performance.
Whether it is a high-performance courtyard robot, like the Yarbo courtyard robot shared at the conference, or a cost-sensitive popular AI learning pen, they can find the best balance of cost and performance in its product matrix, significantly lowering the threshold for AI productization.
In the automotive electronics exhibition area, Rockchip has focused on core areas such as smart cockpits, in-vehicle audio, in-vehicle vision, and automotive domain control, covering a rich variety of application forms for both front-mounted and rear-mounted, commercial and passenger vehicles, showcasing nearly a hundred of the latest products including automotive central control, 3D LCD instruments, mobile armrest screens, headrest interactive screens, palm vein recognition, ceiling entertainment screens, in-vehicle VR, standard machines, external amplifiers, desktop AI robots, etc.
As one of the featured exhibition areas this year, the robotics exhibition area has a rich variety of products based on RK3588, RK3576, RK3568, RK3562, RK3566, RV1126, etc., including cleaning robots, lawn mowing robots, service robots, traditional Chinese medicine health service robots, logistics and warehousing robots, robotic arms, companion robots, and desktop robots, as well as the first heavy exhibition of embodied robots and robotic dogs using Rockchip chips as the central nervous system.
This series of rich product features also aligns well with the strategic thinking of leading companies in various chip segments: establishing ecological adaptability across all scenarios, from low to high.
03
New Standards for AIoT Chips
As AIoT chips move towards modularization, ecological integration, and scene adaptation, new industry standards are quietly being established.
First, flexibility has become an important standard.
Rockchip’s “main chip + co-processor” solution demonstrates a feasible path for the industry, showing how to allow terminal manufacturers to flexibly configure device computing power platforms based on actual needs, no longer limited by fixed computing power SoC chips. This greatly lowers the development threshold, cost, and time-to-market for products in specific scenarios.
As the computing power structure shifts towards the edge, both domestically and internationally, the emergence of related open-source models has significantly lowered the hardware threshold for AI applications. Rockchip’s high-end, mid-range, and entry-level computing power configurations demonstrate high value at this time, providing flexible options.
Moreover, scene adaptation capability will become a core competitive advantage beyond the process.
Whether it is the RV1126B targeting visual processing, RK2116 focusing on audio experience, or the co-processor RK182X, they all signify that the new generation of AIoT chips is shifting from being all-purpose to being specialized, deeply optimizing for specific scenarios.
This process does not necessarily require a gamble on a specific field or high demands for process generation-leading; its core is to make chip design adaptable to potential scene demands, giving customers more freedom.
Market data has already confirmed the success of this approach.
From Rockchip’s financial data, in 2024, Rockchip achieved operating revenue of 3.136 billion yuan, a year-on-year increase of 46.94%; in the first half of 2025, according to the semi-annual performance forecast announcement, the company expects revenue of 2.045 billion yuan, a year-on-year increase of 64%, with performance growth mainly coming from the explosion of the AIoT market. The net profit attributable to the parent company is expected to be 520 million to 540 million yuan, a year-on-year increase of 185% to 195%.
According to QYResearch, the global low-power AIoT chip market is expected to reach approximately $2.873 billion in 2024, and is projected to reach $10 billion by 2031, with a compound annual growth rate of 19.5%. The growth rate of China’s AIoT SoC chip market is even faster, expected to exceed 350 billion yuan by 2030.
Quickly mastering the new game rules is an urgent task for all chip manufacturers.
04
Conclusion
“AIoT model innovation redoing products”, as the theme of this conference states, when AI begins to accelerate industry competition, all traditional products need to rethink their existence forms and value logic.
Rockchip’s approach is to elevate its strategic position from SoC supplier to the cornerstone of AIoT 2.0, positioning itself as a platform company that deeply empowers developers.
That is, no longer limited to competing on the performance of single chips, but rather surrounding multiple technical directions, building an integrated platform of chips + models + toolchains, forming a developer ecosystem that is difficult to replicate and has high barriers to entry.
This may also be the true significance of the new standards for AIoT chips: how to make intelligence ubiquitous yet invisible, making technology powerful enough yet simple enough.
Search and add the WeChat account of Chip Flow Andrew_7251 for in-depth discussions on more new developments in the semiconductor industry. For market and project consulting, talent services, and decision-making analysis, add Aristodemus0403.
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