A Waveform Generator Designed Based on DSP Chip
In signal processing systems in fields such as communication, instrumentation, and control, sine waves and other waveform generators are frequently used. There are typically two methods to generate the desired waveforms.
One method is to directly generate the waveform using algorithms (for example, a sine wave can be obtained through Taylor series expansion). This method can accurately compute the waveform values for each angle and occupies less storage space. The other method is the lookup table method, which requires a large table for high precision, thus occupying more storage space, but it offers better real-time performance than the first method. We will mainly discuss the second method.
The system mainly includes the following components: DSP, DAC, low-pass filtering circuit after DAC, and two programmable operational amplifiers PGA205 and PGA1039. It has one program bus and three data buses, a highly parallel arithmetic logic unit (ALU), dedicated hardware logic, internal memory, enhanced HPI interface, and a CPU frequency of up to 100MHz, allowing it to complete two reads and one write operation in one cycle. The D/A conversion uses a 16-bit low-power DAC AD7846 from ADI Company, achieving high-speed synchronous digital-to-analog conversion.
The programmable gain amplifiers used are the PGA205 and PGA103 from BB Company in the United States, which can operate with a power supply ranging from 4.5V to 18V, setting gain through inputs compatible with CMOS and TTL, and providing fast settling times.
The TMS320VC5402 and DAC AD7846 exchange data through the parallel I/O interface of VC5402, controlling the four digital logic lines of AD7846 via address lines. When both cs and R/W are set to low, data writing to the DAC begins. After a delay, LDAC is set high, CLR is set low, and the DAC performs digital-to-analog conversion. Finally, both R/W and CLR are set low to clear the DAC latch. Of course, it can also be controlled through CPLD.
The backend operational amplifier circuit is composed of programmable gain amplifiers PGA205 and PGA103 in series. This amplifier circuit can provide programmable gain amplification from G=1 to G=800. The specific input values for gain are detailed in the truth table of reference [5]. The digital input can interface directly with general CMOS and TTL logic elements. The logic input is referenced to ground. If the digital input does not have a latch, changes to the logic input will immediately select the new gain. The switching time for the logic input is approximately 0.5 microseconds.
The response time for gain changes equals the switching time plus the time required for the amplifier to stabilize to the new input voltage corresponding to the newly selected gain. For 0.01% precision, when G=10, the stabilization time is 2.5 microseconds; when G=100, the stabilization time is 8 microseconds. In this system, an external logic latch is used to latch the gain control signals from the high-speed data bus. Using an external latch can separate the high-speed digital bus from sensitive analog circuits. The latch circuit should be placed as far from the analog circuit as possible to avoid coupling digital noise into the analog circuit.
DSP source program .mmregs .globalmain .sect”MAIN” main: stm#TAB,AR0；point to table header tm#167H,AR3；set loop count HI_PULSE: ssbxxf stm#20H,AR5 NOP
LOOP1: NOPBANZLOOP1,*AR5-；delay1NOP
portw*ar0+,8h；a1–cs60ns,a2–r/w60ns,a0–clr70ns NOP NOP NOP rsbxxf；ldac(70ns)’0′ transferred portw*ar5,3ha0–clr’1′ transferred NOP NOP NOP portw*ar5,7h；a0–clr(70ns)clr’0’a2–r/w’1’clear dac latch
BANZTT,*AR3-；check if reached table end, jump to table header stm#TAB,AR0；point to table header stm#167H,AR3；set loop count BHI_PULSE；portw*ar5,4h；a0–clra0–clr’0’a2–r/w’1’clear dac latch TT: stm#20H,AR2 NOP LOOP2:delay2
NOP BANZLOOP2,*AR2- NOP；not reached table end BHI_PULSE
TAB: This table contains sine table values, which can also be changed to any desired waveform table values .word0ff82H,0ff4bH,0ff0aH,0fec0H,0fe6bH .word0fe0dH,0fda4H,0fd32H,0fcb7H,0fc31H .word………… .word0ff82H,0ffafH,0ffd2H,0ffebH,0fffaH .end
AD7846 (1) AD7846 has two operating modes: unipolar (0V-5V, 0V-10V output range) and bipolar (5V, 10V output range). In unipolar operation, VREF+ must be connected to the required positive reference voltage, while VREF_ is grounded; in bipolar operation, VREF+ and VREF_ must be connected to the required positive and negative reference voltages, respectively;
(2) Additionally, since AD7846 has an integrated operational amplifier, if the RIN pin is grounded, the output range is 2VREF_~2VREF+; if the RIN pin is shorted to the VOUT pin, the output range is VREF_~VREF+.
High-Speed DSP System Design
(1) In high-speed systems, especially in analog-digital mixed systems, grounding issues must be particularly noted. Besides connecting the power supply ends, digital ground and analog ground should be separated. Furthermore, using a large area ground impedance is crucial. The printed circuit board should preferably use multilayer routing, with one layer serving as the ground layer, and the ground layer should cover as much area as possible beneath high-speed devices.
(2) Properly addressing power decoupling issues is also essential for high-speed digital systems. To prevent the cables or wires at the power input from introducing distributed inductance, the power supply should be placed close to the devices, and large decoupling capacitors should be bridged across the total power input.
(3) When routing signals, avoid crossing digital and analog signals; if crossing is necessary, try to cross at right angles. Multilayer routing should be preferred, with adjacent layers’ routing being orthogonal as much as possible.
The DSP’s computing capability, combined with the DAC (AD7846) (which receives a 1.25V reference voltage from AD1580), uses a higher number of sampling points to generate high-precision waveforms in real time. This solution achieves both high precision and good real-time performance, making it an excellent waveform generator.
