FAQ152: How to Create Slots on a Specific Layer in CST PCB Studio?
Author | Danner Dan During the process of performing signal integrity (SI) and power integrity (PI) simulations in CST PCB Studio, it may be necessary to modify the imported PCB. Modifications to signal traces, nets, stackups, vias, and padstacks can be made using the CST PCB Studio’s Edit ribbon, as shown in the figure below. … Read more