Achieving Sub-Microsecond Inter-Core Communication with Wanghu Real-Time Linux

Achieving Sub-Microsecond Inter-Core Communication with Wanghu Real-Time Linux

This issue focuses on the sub-microsecond inter-core communication solution of Wanghu Real-Time Linux, which stabilizes inter-core communication latency between 120 nanoseconds and 180 nanoseconds, with jitter not exceeding 60 nanoseconds, supporting sub-microsecond real-time control tasks in more complex multi-core architectures. Next, we will present the complete testing process and analyze how this solution achieves extremely … Read more

Principle of Inter-Core Communication Between STM32H7 Using FreeRTOS Message Buffers

Principle of Inter-Core Communication Between STM32H7 Using FreeRTOS Message Buffers

Follow and star our public account to not miss exciting content Source: FreeRTOS Edited by: strongerHuang FreeRTOS version 10.3.1 has been released, and the official website has also been updated (everyone can take a look). Today, I will share with you: using FreeRTOS message buffers to achieve simple asymmetric multi-processing (AMP) core-to-core communication (STM32H7 dual-core … Read more

Experimental Hybrid Deployment of Heterogeneous Multicore OS on Milk-V DuoS

Experimental Hybrid Deployment of Heterogeneous Multicore OS on Milk-V DuoS

Experimental Hybrid Deployment of Heterogeneous Multicore OS on Milk-V DuoS Background The CPU of DuoS adopts a multicore design, allowing for the hybrid deployment of multiple operating systems, with the big cores running a Linux system and the small cores running a real-time system, currently FreeRTOS. The V2 version image (whether for RISC-V cores or … Read more