Exploration Methods for Chip Architecture

The core objective of chip architecture exploration is to find the optimal hardware architecture solution for specific workloads under given constraints of power consumption, performance, area, and cost. Traditional methods, which heavily rely on experience and simulation, are gradually being replaced by automated and intelligent methods based on big data and artificial intelligence. 1. Domestic … Read more

The GPU Revolution: Simplifying Computational Architecture for Large Model Training

The GPU Revolution: Simplifying Computational Architecture for Large Model Training

The GPU Revolution: Simplifying Computational Architecture for Large Model Training As the hundred billion parameter models roar in GPU clusters, a revolution in computational efficiency driven by architectural simplification is quietly reconstructing the physical laws and energy consumption boundaries of large model training. 1. The GPU Dilemma in Large Model Training: Challenges of Computational Power, … Read more

Low Power Design: (2) System-Level Optimization

Low Power Design: (2) System-Level Optimization

In chip design, power consumption optimization is a key factor determining chip performance, battery life, heat dissipation, and cost. The sources of power consumption mainly involve power supply voltage, clock frequency, number of devices, and process technology (which affects threshold voltage and leakage current). From the composition of power consumption, we can optimize at different … Read more

Optimizing Hardware-Software Collaboration: Arm Technology’s New Generation ‘Zhouyi’ NPU for Efficient Deployment of DeepSeek-R1

Optimizing Hardware-Software Collaboration: Arm Technology's New Generation 'Zhouyi' NPU for Efficient Deployment of DeepSeek-R1

Recently, the hardware platform equipped with Arm Technology’s latest generation ‘Zhouyi’ NPU processor successfully ran the DeepSeek-R1 series models, delivering outstanding performance and excellent cost-effectiveness, providing users with a more efficient and convenient AI application experience. This innovative NPU processor adopts an architecture design optimized for large model characteristics, and its beta version has been … Read more

Domestic AI Chips No Longer ‘Dependent’! DeepSeek’s Key Step

Domestic AI Chips No Longer 'Dependent'! DeepSeek's Key Step

This time, the Chinese AI industry is truly different. Recently, there has been a piece of news in the tech circle that, although seemingly ordinary, is incredibly exciting upon reflection—DeepSeek has released version 3.1, introducing the UE8M0 FP8 precision format, specifically optimized for domestic AI chips. Following the announcement, A-share chip stocks surged across the … Read more

STMicroelectronics Acquires Deeplite: A New Paradigm of “Soft-Hard Integration” in the Edge AI Revolution

STMicroelectronics Acquires Deeplite: A New Paradigm of "Soft-Hard Integration" in the Edge AI Revolution

On April 27, 2025, the global semiconductor industry received significant news: European chip giant STMicroelectronics (ST) officially announced the acquisition of Canadian AI startup Deeplite. This seemingly low-key transaction actually contains the key logic of the semiconductor industry’s transformation towards edge intelligence— as computing power shifts from the cloud to the edge, ST is reconstructing … Read more

Core Strategies for Low Power Design in BLE: Detailed Explanation of Hardware Selection, Software Optimization, and Protocol Configuration

Core Strategies for Low Power Design in BLE: Detailed Explanation of Hardware Selection, Software Optimization, and Protocol Configuration

The following are the key strategies and implementation methods for low power design in BLE devices, covering hardware selection, software optimization, protocol configuration, and practical cases to help developers design ultra-low power Bluetooth devices: 1. Hardware Design Optimization (1) Select Low Power Chips •Recommended Chips: ○nRF52 Series (Nordic Semiconductor): Supports deep sleep modes (e.g., System … Read more

What To Do When RTC Clock Experiences Delays or Timeouts?

What To Do When RTC Clock Experiences Delays or Timeouts?

Introduction When an embedded system is running, the RTC clock can be affected by various factors leading to delays or timeouts, impacting system time synchronization and functionality stability. This article will propose a comprehensive solution ranging from hardware adaptation to software algorithm optimization to address this issue, ensuring the accuracy and reliability of the RTC … Read more