Understanding Xilinx FPGA JTAG Interface

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With the increasing popularity of USB interfaces, almost all interfaces can now be converted to USB interfaces. This article mainly introduces the solution for converting the Xilinx FPGA JTAG interface to a USB interface.
The Xilinx FPGA JTAG interface can be output in the following ways:
  • Using a standard 14pin/20pin JTAG interface;
  • Using Xilinx’s universal 6pin header;
  • Using conversion chips to convert to USB.
The first two methods require an external dedicated downloader, which then connects to the PC via USB for debugging.

Understanding Xilinx FPGA JTAG Interface

Understanding Xilinx FPGA JTAG Interface

Due to the standard 10pin, 14pin, and 20pin JTAG interfaces taking up space, a simplified 6pin JTAG interface has emerged, using a 2.54mm pitch single row pin, with pin definitions generally as:VREF, GND, TCK, TDO, TDI, TMS.

Understanding Xilinx FPGA JTAG Interface

With the popularity of single-chip solutions, more and more dedicated chips have emerged, and the third method is becoming increasingly common, with some common solutions being:
  • Using Digilent’s JTAG-SMT module;

  • Using USB to JTAG chips: such as FTDI’s FT2232, FT4232, etc., but require external EEPROM configuration, which is relatively complicated.

The Digilent JTAG series is shown below:

Understanding Xilinx FPGA JTAG Interface

FTDI’s JTAG to USB chips are quite common, generally chosen to be directly placed on the board, with a USB interface exposed directly.

Understanding Xilinx FPGA JTAG Interface

Understanding Xilinx FPGA JTAG Interface

Understanding Xilinx FPGA JTAG Interface

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Understanding Xilinx FPGA JTAG Interface

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Understanding Xilinx FPGA JTAG Interface

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Understanding Xilinx FPGA JTAG Interface

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Understanding Xilinx FPGA JTAG Interface

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Understanding Xilinx FPGA JTAG Interface

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