Rapidus Provides Version 0.5 of 2nm PDK, Tenstorrent Aims for Tape-out of Collaborative Chip This Year

On April 21, news emerged that AI chip company Tenstorrent held the opening ceremony of its Tokyo office on the 17th of this month. The company’s CEO and renowned chip designer Jim Keller attended the event in Japan and also visited its partner Rapidus located in Hokkaido.

Rapidus Provides Version 0.5 of 2nm PDK, Tenstorrent Aims for Tape-out of Collaborative Chip This Year

During a press conference, Jim Keller stated that Rapidus has now provided version 0.5 of the 2nm GAA process PDK (Process Design Kit), and the official operation of the pilot line is scheduled to begin in June to July of this year. The collaborative 2nm process RISC-V architecture edge AI accelerator between Rapidus and Tenstorrent aims to achieve tape-out this year.

Tenstorrent’s Tokyo office can accommodate approximately 80 employees, with the current number of employees being around 15. Tenstorrent will continue to recruit staff in Japan and train chip engineers.

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