Before discussing buses, we should first understand what a bus is. According to Baidu, the complete definition is: a bus is a common communication trunk for transmitting information between various functional components of a computer. It is a transmission line bundle composed of wires, categorized according to the type of information transmitted by the computer.
In fact, I believe a bus is an internal structure, a public channel for transmitting information between the CPU, memory, input, and output devices. Engineers often use a set of lines, configured with appropriate interface circuits, to connect various components and peripheral devices, simplifying hardware circuit design and system structure. This set of shared connection lines is called a bus. Additionally, using a bus structure facilitates the expansion of components and devices, especially when a unified bus standard is established to enable interconnection between different devices.
Bus Classification:
1. Buses can be classified into five major types based on functionality and specifications: data bus, address bus, control bus, expansion bus, and local bus.
The data bus, address bus, and control bus are collectively referred to as the system bus, which is commonly understood as the bus. Common data buses include ISA, EISA, VESA, PCI, etc.
Address Bus: This is specifically used to transmit addresses. Since addresses can only be sent from the CPU to external memory or I/O ports, the address bus is always unidirectional and tri-state, which differs from the data bus. The bit width of the address bus determines the size of the memory space that the CPU can directly address.
Control Bus: This is used to transmit control signals and timing signals. Some control signals are sent from the microprocessor to memory and I/O interface circuits, while others are feedback from other components to the CPU, such as interrupt request signals, reset signals, bus request signals, device ready signals, etc.
2. Based on the method of data transmission, buses can be divided into serial buses and parallel buses. In a serial bus, binary data is sent bit by bit through a single data line to the destination device; in a parallel bus, the data lines usually exceed two. Common serial buses include SPI, I2C, USB, and RS232, etc.
3. Based on whether the clock signal is independent, buses can be divided into synchronous and asynchronous buses. The clock signal of a synchronous bus is independent of the data, while the clock signal of an asynchronous bus is extracted from the data. SPI and I2C are synchronous serial buses, while RS232 uses an asynchronous serial bus.
4. In microcomputers, buses generally include internal buses, system buses, and external buses. The internal bus is the bus between various peripheral chips and the processor within the microcomputer, used for chip-level interconnection; the system bus is the bus between various plug-in boards and the system board within the microcomputer, used for plug-in board-level interconnection; the external bus is the bus between the microcomputer and external devices, allowing the microcomputer to exchange information and data with other devices through this bus, used for device-level interconnection.
With so many classifications, I can only choose one to introduce, so I will choose the internal bus, system bus, and external bus.
Internal Bus
I2C Bus: The I2C (Inter-IC) bus was introduced by Philips over 10 years ago and has been widely adopted in the field of microelectronic communication control in recent years. It is a special form of synchronous communication, characterized by fewer interface lines, simplified control methods, smaller device packaging, and relatively high communication speed. In master-slave communication, multiple I2C bus devices can be connected to the I2C bus simultaneously, identified by their addresses.
SCI Bus: The Serial Communication Interface (SCI) was also introduced by Motorola. It is a universal asynchronous communication interface (UART) and is fundamentally the same as the asynchronous communication function of MCS-51.
IIS: The I2S (Inter-IC Sound Bus) is a bus standard established by Philips for audio data transmission between digital audio devices. I2S has three main signals: 1. Serial Clock (SCLK), also called bit clock, corresponds to each bit of digital audio data; SCLK has one pulse. 2. Frame Clock (LRCK), used to switch between left and right channel data. LRCK being “1” indicates that the data being transmitted is for the left channel, while “0” indicates data for the right channel. 3. Serial Data (SDATA), which represents audio data in binary complement. Sometimes, to better synchronize between systems, an additional signal called Master Clock (MCLK), also known as System Clock (Sys Clock), needs to be transmitted.
SPI: SPI (Serial Peripheral Interface) was first defined by Motorola on its MC68HCXX series processors. The SPI interface is primarily used between EEPROM, FLASH, real-time clocks, AD converters, digital signal processors, and digital signal decoders. The SPI interface operates in a master-slave mode, typically involving one master device and one or more slave devices, with the following four signal interfaces: (1) MOSI – Master Out Slave In (data output from master, data input to slave) (2) MISO – Master In Slave Out (data input to master, data output from slave) (3) SCLK – Clock signal generated by the master device (4) /SS – Slave Select signal controlled by the master device.
UART: UART (Universal Asynchronous Receiver Transmitter) converts parallel data transmitted from the computer into a serial data stream for output. It converts incoming serial data from external sources into bytes for internal use by devices that utilize parallel data. The output serial data stream includes parity bits for error checking, and it performs parity checking on the incoming data stream. Start and stop markers are added to the output data stream, and start and stop markers are removed from the incoming data stream. It handles interrupt signals generated by devices such as keyboards or mice (which are also serial devices). Some high-end UARTs also provide input/output data buffering. Common signals include TXD, RXD, /RTS, /CTS.
JTAG: JTAG (Joint Test Action Group) is an international standard testing protocol (IEEE1149.1 compatible), primarily used for internal testing of chips. The standard JTAG interface consists of four lines: TMS, TCK, TDI, and TDO, which correspond to mode selection, clock, data input, and data output lines, respectively. A test reset signal (TRST, usually active low) is generally considered an optional fifth port signal. A CPU with a JTAG Debug interface module can access the CPU’s internal registers and devices connected to the CPU bus, such as FLASH, RAM, and registers of built-in modules like UART, timers, GPIO, etc., as long as the clock is functioning normally.
CAN: CAN stands for “Controller Area Network,” and is one of the most widely used field buses internationally. Initially, CAN was designed for microcontroller communication in automotive environments, exchanging information between various electronic control units (ECUs) in vehicles to form an automotive electronic control network. For example, the engine management system, transmission controller, instrument equipment, and electronic backbone systems all embed CAN control devices. A single network constructed with CAN bus can theoretically connect countless nodes. In practical applications, the number of nodes is limited by the electrical characteristics of the network hardware. For instance, when using the Philips P82C250 as a CAN transceiver, up to 110 nodes are allowed to connect in the same network. CAN can provide data transmission rates of up to 1Mbit/s, making real-time control very feasible. Additionally, the hardware error detection features enhance CAN’s resistance to electromagnetic interference.
SDIO: SDIO is an extension interface of the SD type, which can connect not only SD cards but also devices that support the SDIO interface. The port’s purpose extends beyond merely inserting storage cards. Devices such as PDAs and laptops that support the SDIO interface can connect to GPS receivers, Wi-Fi or Bluetooth adapters, modems, LAN adapters, barcode readers, FM radios, television receivers, RFID readers, or digital cameras that use the SD standard interface.
GPIO: GPIO (General Purpose Input Output) or bus expander simplifies the expansion of I/O ports using industrial standard I²C, SMBus™, or SPI™ interfaces. When a microcontroller or chipset lacks sufficient I/O ports, or when the system requires remote serial communication or control, GPIO products can provide additional control and monitoring functions.
System Bus
ISA Bus: The ISA (Industrial Standard Architecture) bus standard was established by IBM in 1984 for the launch of the PC/AT machine, also known as the AT bus. It is an extension of the XT bus to accommodate 8/16-bit data bus requirements. It was widely used during the 80286 to 80486 era, to the extent that ISA bus slots are still retained in modern Pentium machines. The ISA bus has 98 pins.
EISA Bus: The EISA bus was jointly launched in 1988 by Compaq and eight other companies as a bus standard. It is based on the ISA bus, using double-layer sockets, adding 98 signal lines to the original 98 signal lines of the ISA bus, which means adding one EISA signal line between each pair of ISA signal lines. In practice, the EISA bus is fully compatible with ISA bus signals.
VESA Bus: The VESA (Video Electronics Standards Association) bus was launched in 1992 by 60 accessory card manufacturers as a local bus, abbreviated as VL (VESA Local Bus). Its introduction laid the foundation for the innovation of microcomputer system bus architecture. This bus system considers the direct connection between the CPU and main memory/cache, typically referred to as the CPU bus or main bus, while other devices connect to the CPU bus through the VL bus, thus the VL bus is called a local bus. It defines a 32-bit data line, which can be expanded to 64 bits through expansion slots, using a 33MHz clock frequency, with a maximum transfer rate of 132MB/s, capable of synchronous operation with the CPU. It is a high-speed, efficient local bus that supports 386SX, 386DX, 486SX, 486DX, and Pentium microprocessors.
PCI Bus: The PCI (Peripheral Component Interconnect) bus is currently one of the most popular buses, introduced by Intel as a local bus. It defines a 32-bit data bus, which can be expanded to 64 bits. The PCI bus motherboard slot is smaller than the original ISA bus slot, with greatly improved functionality compared to VESA and ISA, supporting burst read/write operations, with a maximum transfer rate of up to 132MB/s, and can support multiple groups of peripheral devices simultaneously. The PCI local bus is not compatible with existing ISA, EISA, and MCA (Micro Channel Architecture) buses, but it is not limited by the processor, being developed based on newer microprocessors like Pentium.
External Bus
RS-232-C Bus: RS-232-C is a serial physical interface standard established by the Electronic Industries Alliance (EIA) in the United States. RS is the abbreviation for “Recommended Standard,” 232 is the identification number, and C indicates the revision number. The RS-232-C bus standard has 25 signal lines, including a main channel and an auxiliary channel, with the main channel primarily used in most cases. For general duplex communication, only a few signal lines are needed, such as one sending line, one receiving line, and one ground line. The RS-232-C standard specifies data transmission rates of 50, 75, 100, 150, 300, 600, 1200, 2400, 4800, 9600, 19200 baud. The RS-232-C standard allows drivers to have a capacitive load of 2500pF, with communication distance limited by this capacitance. For example, when using a communication cable with a capacitance of 150pF/m, the maximum communication distance is 15m; if the capacitance per meter is reduced, the communication distance can be increased. The short transmission distance is also due to RS-232 being a single-ended signal transmission, which has common ground noise and cannot suppress common-mode interference, thus generally used for communications within 20m.
RS-485 Bus: When communication distances range from dozens of meters to thousands of meters, the RS-485 serial bus standard is widely used. RS-485 uses balanced transmission and differential reception, providing the ability to suppress common-mode interference. Additionally, the bus transceiver has high sensitivity, capable of detecting voltages as low as 200mV, allowing the transmission signal to be recovered over long distances. RS-485 operates in half-duplex mode, meaning that only one point can be in sending state at any time, thus the sending circuit must be controlled by an enable signal. RS-485 is very convenient for multipoint interconnection, allowing for the reduction of many signal lines. Using RS-485 can create a distributed system, allowing for a maximum of 32 drivers and 32 receivers to be connected in parallel.
IEEE-488 Bus: The IEEE-488 bus is used to connect systems, such as microcomputers, digital voltmeters, digital displays, and other instruments. It transmits signals in a bit-parallel, byte-serial, bidirectional asynchronous manner, with a bus connection method, allowing instruments to be directly connected to the bus without intermediary units, but a maximum of 15 devices can be connected to the bus. The maximum transmission distance is 20 meters, with a typical signal transmission speed of 500KB/s and a maximum transmission speed of 1MB/s.
USB Bus: The Universal Serial Bus (USB) is a new interface standard jointly launched by seven world-renowned computer and communication companies, including Intel, Compaq, Digital, IBM, Microsoft, NEC, and Northern Telecom. It is based on universal connection technology, enabling simple and quick connections for peripherals, aiming to facilitate users, reduce costs, and expand the range of PC-connected peripherals. It can provide power to peripherals, unlike ordinary devices using serial and parallel ports that require separate power systems.
Additionally, as automotive electronics have recently gained popularity, I would like to discuss the LIN and CAN buses in automotive networks:
As early as 1983, Bosch began developing the Controller Area Network (CAN) bus and officially released the related protocol in 1986. Currently, there are various automotive bus standards, but CAN remains the most popular standard. In a CAN network, all nodes (from different ECUs) act as master nodes (i.e., there is no master-slave topology), and no specific addresses are assigned. Instead, messages carry identifiers.
At any given time, multiple nodes can simultaneously send data to the CAN bus. The message identifier helps determine the priority of messages. The highest priority message causes the CAN bus to enter the dominant state, while all other nodes stop sending. These nodes act as transceivers, allowing them to receive specific messages from the bus based on their specific functions. Therefore, information flow occurs between different nodes connected by the CAN bus.
Due to the various error checks performed by CAN, including fill errors, bit errors, checksum errors, frame errors, and acknowledgment errors, it has high reliability. CAN supports data transmission rates of up to 1Mbps, making it the default choice for connecting critical functions in vehicles (such as transmission, temperature sensors, etc.).
But why do cars choose LIN?
The role of automotive electronics is not limited to these critical units. The body electronics market has been growing for years. Typical body control applications include seats, windows, intelligent wipers, and automotive air conditioning sensors. The key requirement for body electronics is to ensure greater comfort and safety in vehicles. Although these systems may not require the high reliability of critical ECUs, they still need a certain automotive network communication standard.
Comparison of LIN and CAN:
Implementing CAN is more costly than implementing LIN. Factors that contribute to the higher cost of CAN include:
– Each node in the CAN network requires a clock generator or crystal;
– The chip-level implementation of CAN is more complex;
– It uses dual-wire transmission.
Most importantly, the entire costly architecture is overly extravagant for applications that do not require high reliability and high data rates.
That concludes the overview of various bus types. I hope it helps engineers in some way.
