ISO-SPI Simulation Technology: Efficient Solutions for High Voltage Battery BMS Testing

The voltage of electric vehicle batteries is increasing from 400V to 800V, and the voltage of large-scale energy storage system batteries is rising from 600V-900V to 1500V. Engineers face a dilemma when proposing hardware-in-the-loop (HIL) requirements for high voltage battery BMS: the number of battery cell channels versus the simulation effectiveness. When the number of channels is insufficient, it often requires the use of test firmware to reduce the system scale. However, this makes it impossible to simulate the complexity of hundreds of battery cell series in a real system or accurately simulate multiple abnormalities occurring simultaneously in a complete system, or the complex conditions where different abnormal scenarios affect each other. On the other hand, configuring a full number of battery cell simulators would significantly increase costs and space requirements.

These high voltage electric vehicle lithium battery packs and large-scale energy storage systems widely adopt a distributed BMS architecture, which includes BCU (Battery Control Unit) and BMU (Battery Management Unit). The BMU is responsible for monitoring battery cell voltage and temperature data, and executing cell balancing functions; the BCU manages the battery pack, safety protection, and external communication based on the information provided by the BMU. In high voltage environments, ISO-SPI communication technology has become the mainstream choice for internal communication due to its high voltage isolation and low cost characteristics.

By using ISO-SPI simulation technology to simulate the interaction scenarios between BCU and BMU, the BCU mainboard can recognize the virtual BMU as part of a complete system, and it can also simulate the BCU to test the BMU sub-board separately. Therefore, it is possible to build a complete testing platform without preparing a full number of battery cell simulators and all the test items.

▲ Hybrid testing system using Chroma ISO-SPI simulator with multiple BMUs and battery cell simulators

▲ Chroma ISO-SPI simulator can simulate BCU for separate testing of BMU

This technology must meet two key requirements:

High Speed: Taking the commonly used NXP MC33771B and MC33664 IC combination in BMS as an example, the ISO-SPI rate reaches 2Mbps, and the simulation system needs to respond quickly and maintain stable communication.
High Compatibility: Different brands of ICs have significant differences in data formats and control programs, and the simulator needs to have the capability for hardware and software updates to achieve broad compatibility.

Chroma’s ISO-SPI simulation technology is based on an FPGA architecture, which supports various BMS front-end processing and communication ICs through firmware upgrades, meeting the needs for speed and compatibility.

The Chroma 8630 BMS power stage hardware-in-the-loop testing platform has applied this technology to establish a complete BMS testing platform by using battery cell simulators combined with virtual test items, conducting tests that include real and virtual dynamic scenarios, fault injection, model importation, etc., significantly reducing testing costs and becoming an efficient tool for battery development and testing.

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