Introduction to the Sources of CIS Pixels in Semiconductor Integrated Circuit Image Sensors

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Previously mentioned were some sources and suppression mechanisms of dark current in CMOS Image Sensors (CIS)

Dark Current is the non-ideal current generated by CMOS image sensors under no light conditions, primarily formed by thermally excited carriers, which directly affects the signal-to-noise ratio (SNR) and dynamic range of the image. Its sources can be categorized into physical mechanisms, structural defects, and process factors, which will be detailed below with illustrations.

1. Physical Mechanisms: Thermal Excitation and Energy Band Defects

  1. Generation-Recombination in the Depletion Region (SRH Theory) where silicon lattice defects or impurities (such as metal ions) introduce deep energy level traps in the bandgap. The influence of carrier concentration and temperature indicates that as temperature increases, dark current increases.

  2. Diffusion Current

    originates from the neutral region of the PN junction (P-type substrate/N-type epitaxial layer) where thermally excited carriers diffuse.

To the boundary of the depletion region. This part was mentioned earlier.

3. Surface Generation Current The mechanism is mainly due to dangling bonds at the Si-SiO₂ interface forming interface states, which become centers for carrier generation. Such as STI interface, DTI interface, and the upper surface of silicon.

2. Sources of Pixel Structural Defects

  1. Edge Leakage from Shallow Trench Isolation (STI)

  2. Deep Trench Isolation (DTI) reduces sidewall area (Samsung ISOCELL technology). STI etching causes damage to the silicon lattice, significantly increasing the density of interface states.
  3. Transfer Gate (TG) interface states, where the mechanism involves interface states below the TG oxide layer generating electrons during integration, injecting into the photosensitive area.

4. Metal Contamination and Lattice Defects, which become generation-recombination centers due to stress from high-temperature processes.

3. Process Factors and Material Influences

  1. Plasma Induced Damage (PID)

  • Annealing Process

  • Pixel Size Shrinkage Effect, leading to an increased proportion of interfaces

    • 4. Dark Current Suppression Technologies

    Technology Mechanism
    Pinned Photodiode (PPD) P+ layer shields interface states, moving the depletion region away from STI
    Backside Illumination (BSI) Shifts the circuit layer down, eliminating metal wiring shading
    Deep Photodiode (Deep PD) Increases the depth of the depletion region, reducing electric field strength
    Low-Temperature Process Reduces thermal budget, suppressing metal diffusion

    Summary: Dark current is a core challenge in CIS pixel design, requiring collaborative suppression through physical model optimization (such as PPD), process control (low-damage etching/passivation), and structural innovation (DTI/BSI). Future sub-micron pixels need to combine high-k dielectrics with quantum dot engineering to further break through limits.

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