From IoT to Desktop: The Birth of the RISC-V Desktop SoC 'Titan'

“ The release of Milk-V Titan is like a signal flare cutting through the night sky: RISC-V is no longer just a supporting role in the Internet of Things; its first desktop-level SoC has firmly established itself within the walls of traditional chip giants.”

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Haiku OS: Recasting the Essence of BeOS, Moving Towards High Performance and Stability

Significant Kernel Optimization

Since early 2025, Haiku OS has made several optimizations in the memory management layer of the core kernel:

Improved page handling and memory statistics;
Refined <span class="language-plaintext">malloc</span> block sizes;
Optimized thread stack allocation mechanisms;
Introduced cache page fault statistics to enhance system stability and response efficiency.

The bootloader and runtime loader have unified heap memory allocation logic, making the code more consistent and improving execution efficiency.

UI and System Tools Gradually Improved

WebPositive (browser) has added right-click context functionality to the bookmarks bar, improving user interaction experience.
Icon‑O‑Matic (icon design tool) has added a “Delete” transformer menu (contributed by new community members).
TeamMonitor (multi-process monitoring) supports richer sub-team management features, enhancing compatibility with modern multitasking applications.Desktop On Fire
Tracker (file manager) has completely restructured menu and shortcut logic, improving user operability and consistency.

Drivers and File Systems: Expanded Hardware Support

Intel Alder Lake platform driver support has been enhanced;
New AMD Thermal Management Driver has been added to strengthen temperature control capabilities for AMD CPUs;
Added compatibility for Wacom CTH-470 Graphics Tablet and NFSv4 network file system;
RAMFS virtual file system supports FIFO and UNIX Socket special files, achieving more complete system API compatibility.

Project Vitality: Continuous Community Contributions

Several community developers have joined, contributing to various modules including UI, drivers, and system tools.
The open-source vitality of Haiku and the spirit of BeOS are being revitalized through continuous kernel optimization and user experience improvements.

Emerging Architecture Adaptation: RISC-V is Haiku’s first non-x86 architecture

The system can currently boot and run on emulators (such as TinyEMU and QEMU) as well as actual hardware (such as SiFive Unmatched).

HaikuOS RISC-V Compilation Guide

Original link: https://www.webpronews.com/haiku-os-advances-with-speed-and-stability-in-2025/

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ESWIN EBC77: The First High-Performance RISC-V SBC with Ubuntu Support

ESWIN recently released the EBC77, which is the first RV64GC RISC-V single-board computer officially certified by Ubuntu for education and embedded development, combining capabilities such as AI, video playback, and multi-interface expansion, which is significant.

Core Highlights

SoC: Uses ESWIN’s self-developed EIC7700X chip, 4-core SiFive Performance P550 (RV64GC/RVA20) @1.8 GHz, performance comparable to Cortex-A75 level.
AI Acceleration: Integrated NPU, providing up to ~20 TOPS of AI inference capability.
Graphics Multimedia: Equipped with Imagination AXM‑8‑256 GPU, supporting OpenGL ES 3.2, Vulkan 1.2, OpenCL 2.1, and H.265/H.264 decoding up to 8K/50fps format.

Software Support & Limitations

Ubuntu 24.04 LTS: Canonical and ESWIN have collaborated to provide official support for this version, suitable for education, embedded, AI, and various application scenarios.
Upgrade Limitations: Due to the chip not supporting the new specification RVA23 (lacking vector extensions, etc.), it cannot be upgraded to Ubuntu 25.10 or later versions, remaining stuck at 24.04/25.04 versions.

Interpretation and Prospects

Despite its powerful hardware configuration, especially the 20 TOPS NPU and rich expansion, architectural constraints limit its long-term system update capabilities. For long-term projects, users need to assess whether their needs will be met within the 24.04 LTS lifecycle.
For the RISC-V ecosystem, this represents a high-performance LTS support node, while also revealing the future need to focus on the trend of RVA23 vector extension capabilities becoming widespread in SoCs.

Original link: https://www.phoronix.com/news/ESWIN-EBC77-SBC-Ubuntu-Linux

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Ubuntu 25.10’s Thoughtful Efforts: Just Hoping RISC-V Will Quickly Come to the Desktop

To ensure the ability to run core desktop applications such as Firefox and Thunderbird, Canonical has decided to upgrade the minimum ISA version supported for RISC-V from RVA20 to RVA23, which includes vector extensions and hypervisor extensions. This means that approximately 90% of existing RISC-V devices will be unable to upgrade to Ubuntu 25.10, and the upgrade tool will prevent hardware that does not meet RVA23 from entering version 25.10 and beyond.

RISC-V Desktop Goals for Ubuntu 25.10

Comprehensive desktop experience: including GNOME 49 desktop, Firefox browser, and Thunderbird email client, etc.
Implementation methods:

The system will automatically detect whether the hardware supports RVA23-U64, and those that do not will be unable to upgrade.
The system upgrade tool will prevent incompatible hardware from continuing to upgrade.

Technical Highlights of RVA23

Vector Extensions: Accelerate math-intensive tasks such as AI/ML, encryption, and compression, similar to elevating RISC-V to platforms comparable to ARMv9 and x86-64v4 levels.
Hypervisor Extensions: Support virtualization capabilities, suitable for enterprise-level servers and cloud-native environments.

Further Reading:

RISC-V Strategy for Ubuntu 25.10: Why RVA 2.3 is a Turning Point for the Ecosystem?

Original link: https://9to5linux.com/canonical-plans-for-a-fully-functional-desktop-session-on-risc-v-with-ubuntu-25-10

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RISC-V Officially Comes to the Desktop

RISC-V has been moving towards the desktop/server space, and the recent release of Titan by Milk-V is the first RISC-V board with desktop specifications, aimed at aligning with PC/server standards. The release of this development board is a milestone event for the RISC-V community.

System Compatibility and Usage Environment

Operating System Support: Compatible with mainstream Linux distributions including Ubuntu, Debian, Fedora, etc.
Boot Environment: Supports UEFI boot, with expected mainline kernel support planned to be pushed to Q4 2026.

Competitiveness and Ecological Value

Performance Positioning: 8 cores + ECC memory + PCIe 4.0, targeting mid-to-high-end desktop and server platforms;
AI/Acceleration Support: Supports GPU/NPU hardware expansion through PCIe slots, combined with the high performance of UR-DP1000, providing certain AI capabilities;
Ecological Significance: As one of the first RISC-V platforms supporting ECC, PCIe 4.0, mainstream Linux, and BMC management, it is suitable for individual developers, educational platforms, and lightweight server applications;
Price Reference: Expected price around $279, with first batch pre-order users able to use a $5 deposit to offset $50.

Technical Challenges and Growth Space

Power Consumption and Heat Dissipation: 30W TDP requires active cooling, with onboard fan design to enhance heat dissipation efficiency;
Software Compatibility: Although supporting mainstream distributions, the ecological compatibility differences between RISC-V and x86 are still gradually being bridged;
Ecological Improvement: More community-driven support is needed, such as GPU/NPU drivers, virtualization, and enterprise-level management tools (with the help of BMC), etc.

UR-DP1000 Chip Release Review

Zhihu Review: https://zhuanlan.zhihu.com/p/1925644507183026841

Original link: https://liliputing.com/milk-v-titan-is-a-mini-itx-risc-v-board-with-support-for-ddr4-3200-and-pcie-4-0/

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A New Engine for Accelerating RISC-V Localization: Shanghai Steps Up

On July 17, 2025, at the fifth RISC-V summit held in Shanghai, the Shanghai Open Source Computing Research Institute was officially inaugurated, becoming the second largest local platform after the Beijing Silicon Innovation Center. This institute is an important landing station for the RISC-V ecosystem in China, not only strengthening software development capabilities but also marking the rapid realization of a domestic path from chip design to system-level applications.

Three Major Integrations: Government-Industry-Academia CollaborationThe new institute aims to integrate government policy support, industry actual needs, and university research resources, focusing on:

Distributed AI systems;
Next-generation RISC-V AI programming language compilers;
RISC-V software vertical integration optimization toolchains to accelerate technology commercialization.

Shanghai’s Positioning and Global IntegrationShanghai’s Vice Mayor Chen Jie stated that since 2018, Shanghai has initiated the China RISC-V Industry Alliance and gradually built a supply chain ecosystem covering high-performance computing, smart devices, and automotive electronics.Future plans include linking with the international RISC-V Foundation to create an open platform that integrates software and hardware, and to improve the IP framework, software infrastructure, and standard system.

Direction	Meaning
Ecological Deepening	Shanghai is an important “landing link” in the RISC-V industry, exporting R&D soft power.
Software Strength Promotion	Emphasizes comprehensive capabilities from low-level instructions to AI compilers to system optimization, building a “soft and hard collaborative” closed loop.
Strategic Autonomy	Maps China’s self-reliant path on open architectures, with continuous efforts in AI and HPC scenarios.

Looking Ahead

Core compiler teams from universities are joining, such as projects in collaboration with Tsinghua University and Shanghai Jiao Tong University;
Specific toolchains for AI/security/automotive scenarios will be launched;
Attracting international manufacturers and open-source community collaboration to promote local RISC-V technology standardization and export replication.

Original link: https://www.digitimes.com/news/a20250717PD228/risc-v-shanghai-software-development.html

Focusing on RISC-V industry information, technology trends, and development resources.

From IoT to Desktop: The Birth of the RISC-V Desktop SoC ‘Titan’