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While improving the anti-interference capability of hardware systems, software anti-interference is increasingly valued for its flexible design, resource savings, and reliability. The following research focuses on software anti-interference methods using microcontroller systems as an example.
Research on Software Anti-Interference Methods
In engineering practice, the content of software anti-interference research mainly includes:
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Eliminating noise from analog input signals (e.g., digital filtering technology);
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Methods to bring the program back on track when program execution becomes chaotic.
This article proposes several effective software anti-interference methods for the latter case.
1. Instruction Redundancy
The CPU fetches instructions by first retrieving the opcode and then the operand. When the program counter (PC) is disturbed and an error occurs, the program deviates from its normal trajectory. If it lands on a double-byte instruction, and if the instruction fetch occurs at the operand, the operand may be mistakenly treated as the opcode, causing program errors. The probability of error increases for triple-byte instructions.
To prevent this, inserting single-byte instructions at critical points or rewriting valid single-byte instructions is known as instruction redundancy. Typically, two or more NOPs are inserted after double-byte and triple-byte instructions. This way, even if the program deviates and lands on the operand, the presence of the NOP instruction prevents subsequent instructions from being executed as operands, automatically bringing the program back on track.
Additionally, inserting two NOPs before critical instructions such as RET, RETI, LCALL, LJMP, JC, etc., can also help bring the chaotic program back on track, ensuring the execution of these important instructions.
2. Interception Technology
Interception refers to guiding the chaotic program to a designated location for error handling. Software traps are typically used to intercept chaotic programs, requiring careful design and appropriate placement of the traps.
a. Design of Software TrapsWhen a chaotic program enters a non-program area, redundant instructions cannot take effect. Through software traps, the chaotic program can be intercepted, guided to a designated location, and then error handling can occur. Software traps are instructions used to guide the captured chaotic program to the reset entry address 0000H. Typically, the following instructions are filled in the non-program area of EPROM as a software trap:
b. Arrangement of TrapsTypically, fill unused EPROM space in the program with 0000020000. The last instruction should be filled with 020000. When a chaotic program lands in this area, it can automatically return to normal. Trap instructions can also be placed in the empty units between various modules in the user program area. If an interrupt that is in use opens due to interference, setting a software trap in the corresponding interrupt service program can timely capture erroneous interrupts. For example, even if external interrupt 1 is not used in a certain application system, the interrupt service program for external interrupt 1 can be as follows:
The return instruction can be either “RETI” or “LJMP 0000H”. If the fault diagnosis program and system self-recovery program are reliably and comprehensively designed, using “LJMP 0000H” as the return instruction can directly enter the fault diagnosis program, addressing the fault and restoring program operation as soon as possible. Considering the capacity of the program storage, generally, 2-3 software traps can effectively intercept in a 1K space.
3. Software Watchdog Technology
If a chaotic program enters a “dead loop”, the “watchdog” technology is usually employed to extricate the program from the “dead loop”. By continuously monitoring the program’s loop runtime, if the loop time exceeds the maximum allowed, it is deemed that the system is in a “dead loop” and requires error handling.
The “watchdog” technology can be implemented in hardware or software. In industrial applications, severe interference can sometimes damage the interrupt control word, disabling interrupts. In this case, the system cannot timely “feed the dog”, and the hardware watchdog circuit fails. However, a software watchdog can effectively resolve such issues.
System Fault Handling and Self-Recovery Program Design
Microcontroller systems that reset due to interference or power loss are considered abnormal resets and should undergo fault diagnosis and automatically restore the state prior to the abnormal reset.
1. Identification of Abnormal ResetsProgram execution always starts from 0000H, and there are four possible reasons for the program starting execution from 0000H:
Of these four situations, all except the first are abnormal resets that need to be identified.
Identification of Hardware and Software Resets:Here, hardware reset refers to power-on reset and watchdog reset, which affect registers. For example, after a reset, PC=0000H, SP=07H, PSW=00H, etc. Software reset, however, does not affect SP or PSW. Therefore, for microcomputer measurement and control systems, when the program is running normally, set SP to an address greater than 07H, or set the 5th bit user flag of PSW to 1 during normal operation. Thus, upon reset, checking the PSW.5 flag or SP value can determine whether it is a hardware reset.
Since the state of internal RAM is random during a hardware reset, while a software reset can maintain the state prior to reset, a specific RAM cell can be selected as a power-on flag. For example, using 40H as the power-on flag, if the content of the 40H cell does not equal 78H after a system reset, it is deemed a hardware reset; otherwise, it is a software reset, leading to error handling. If two cells are used as power-on flags, the reliability of this method increases.
Identification of Power-On Reset and Watchdog Fault Reset:Power-on reset and watchdog fault reset are both hardware resets. To correctly identify them, non-volatile RAM or EEPROM is typically needed. When the system is running normally, set an observation unit with power-off protection. During normal operation, ensure this observation unit maintains a normal value (set to AAH) in the interrupt service program for timely feeding the watchdog, while clearing this unit in the main program. If the observation unit is power-protected, checking whether this unit is at a normal value upon power-on can determine if it was a watchdog reset.
Identification of Normal Power-On Reset and Abnormal Power-On Reset:Identifying power-on resets caused by unexpected situations, such as system power loss, is particularly important for process control systems. For instance, in a measurement and control system where time is the control standard, completing a control task takes 1 hour. If the system voltage anomaly causes a reset after 50 minutes of execution, restarting the control task from the beginning would result in unnecessary time consumption.
Therefore, a monitoring unit can be used to monitor the current system operating status and system time, decomposing the control process into several steps or time segments. After completing each step or running for a time segment, the monitoring unit is set to a power-off allowed value. Different tasks or different stages of tasks have different values. If the system is performing a measurement and control task or executing a time segment, the monitoring unit is set to a non-normal power-off value. Thus, after a system reset, the original operating status can be determined based on this unit, and the system can jump to the error handling program to restore its previous operating state.
2. Program Design for System Self-Recovery after Abnormal ResetFor process control systems with strict sequential requirements, recovering from an abnormal reset generally requires starting from the module or task that lost control. Therefore, measurement and control systems should back up important data units and parameters, such as system operating status, process values, current input/output values, current clock values, observation unit values, etc. This data should be backed up periodically, and any modifications should be backed up immediately.
When identifying an abnormal reset, it is essential to restore some necessary system data, such as the initialization of display modules and external expansion chips. Next, the system status and operating parameters of the measurement and control system should be restored, including the recovery of the display interface. Finally, the previous tasks, parameters, and operating times should be restored before entering the system operating state.
It should be noted that accurately restoring the system’s operating state requires meticulous backup of important data and reliability checks to ensure the reliability of the restored data. Additionally, for multi-task and multi-process measurement and control systems, the order of data recovery must be considered.
Basic system initialization refers to initializing the chip, display, input/output methods, etc. It is crucial to ensure that input/output initialization does not cause erroneous actions. The initialization of tasks before reset refers to the execution status and operating times of those tasks.
Other common methods for software anti-interference include digital filtering, RAM data protection, and error correction. In engineering practice, multiple anti-interference methods are usually combined to complement each other for better anti-interference effects. Fundamentally, hardware anti-interference is proactive, while software anti-interference is reactive. Thoroughly analyzing interference sources and combining hardware and software anti-interference, along with perfecting system monitoring programs, can completely design a stable and reliable microcontroller system.
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