1. Overview of CPU I/O Capabilities

The CPU not only has computational capabilities but also needs to exchange data with external devices, a capability known as I/O (Input/Output) capability. Typical I/O operations in a computer system include:

• Keyboard input
• Display output
• Disk read/write
• Network communication, etc.

2. Two Core Issues in Peripheral Interaction

1. Peripheral Event Notification Mechanism

Issue: Peripheral input is random; how can the CPU perceive it in a timely manner?

Solution:

• **Polling**: The CPU periodically checks the device status
• **Interrupt**: The device actively notifies the CPU

2. Data Exchange Channels

Issue: How does the CPU obtain data from peripherals?

Solution:

• Port I/O: Access through dedicated I/O ports
• Memory-mapped I/O: Mapping device registers to memory address space

3. I/O Implementation Mechanism of 8086

1. I/O Port Addressing

The 8086 uses a separate I/O address space (0x0000-0xFFFF) accessed via the IN/OUT instructions:

; Read a byte from port 60h into AL
IN AL, 60h

; Write the byte in AL to port 61h
OUT 61h, AL

2. Example of Keyboard Input Handling

; Keyboard controller port definitions
KEYBOARD_DATA_PORT equ 60h
KEYBOARD_STATUS_PORT equ 64h

wait_for_key:
    in al, KEYBOARD_STATUS_PORT  ; Read keyboard status
    test al, 1                  ; Check if data is available
    jz wait_for_key             ; Wait if no data
    in al, KEYBOARD_DATA_PORT   ; Read keyboard data
    ; At this point, AL contains the key scan code

3. Example of Display Output

; Starting address of text mode video memory
VIDEO_MEMORY equ 0B800h

print_char:
    push es
    push di

    mov ax, VIDEO_MEMORY
    mov es, ax          ; Set ES to video memory segment
    mov di, (80*12+40)*2 ; Center position on the screen

    mov es:[di], al     ; Write character
    mov byte ptr es:[di+1], 07h ; Set attribute (white text on black background)

    pop di
    pop es
    ret

4. Interrupt Handling Mechanism

1. Interrupt Handling Process

1. The device issues an interrupt request
2. The CPU responds to the interrupt after completing the current instruction
3. The CPU saves the context and jumps to the interrupt handler
4. Execute the interrupt service routine
5. Restore the context and return

2. Example of Keyboard Interrupt (INT 09h)

; Assume installed in the interrupt vector table
org 0
keyboard_isr:
    push ax
    push es

    in al, KEYBOARD_DATA_PORT  ; Read keyboard data
    ; Process key...

    mov al, 20h               ; Send EOI (End Of Interrupt)
    out 20h, al

    pop es
    pop ax
    iret                      ; Interrupt return

5. Comprehensive Application: Keyboard Echo Program

assume cs:code
code segment
start:
    ; Set keyboard interrupt vector (actual systems require special handling)
    cli                      ; Disable interrupts
    mov ax, 0
    mov es, ax
    mov word ptr es:[9*4], keyboard_isr
    mov word ptr es:[9*4+2], cs
    sti                      ; Enable interrupts

    ; Main loop does nothing, waiting for interrupts
idle:
    hlt                      ; Sleep until an interrupt occurs
    jmp idle

keyboard_isr:
    push ax
    push bx
    push es

    in al, 60h               ; Read keyboard scan code
    ; Simple handling: only respond to key press events
    test al, 80h             ; Check highest bit (1=release, 0=press)
    jnz end_isr

    ; Convert scan code to ASCII (simplified)
    cmp al, 10h              ; 'Q' key
    je key_q
    cmp al, 1Eh              ; 'A' key
    je key_a
    ; Other key handling...
    jmp end_isr

key_q:
    mov al, 'Q'
    jmp show_char
key_a:
    mov al, 'A'

show_char:
    mov bx, 0B800h
    mov es, bx
    mov bx, [cursor_pos]     ; Get current cursor position
    mov es:[bx], al          ; Display character
    add bx, 2
    mov [cursor_pos], bx     ; Update cursor position

end_isr:
    mov al, 20h
    out 20h, al              ; Send EOI

    pop es
    pop bx
    pop ax
    iret

cursor_pos dw (80*12+40)*2   ; Initial cursor position
code ends
end start

6. Development of Modern Computer I/O

1. DMA (Direct Memory Access): Devices exchange data directly with memory without CPU intervention
2. Advanced Interrupt Controllers: Support more priorities and interrupt sources
3. Memory-mapped I/O: Unified addressing simplifies access
4. Modern interfaces like USB: More efficient protocols and transmission mechanisms

Understanding these fundamental I/O principles is crucial for learning modern operating systems and device driver development, as they form the basis of hardware and software interaction in computer systems.