Collected Q&A Posts for DSP Engineers

Electronics Competition Group:

5-Year Electronic Design Competition Topic D 481123148;

15-Year Electronic Design Competition Topic E 481123833; 15-Year Electronic Design Competition Topic F 73646017;

15-Year Electronic Design Competition Topic G 45169719; 15-Year Electronic Design Competition Topic H 16986998; 15-Year Electronic Design Competition Topic I 80699535; 15-Year Electronic Design Competition Topic J 475528830;

How to choose an external clock?

The internal instruction cycle of the DSP is relatively high, and the main frequency of the external crystal oscillator is insufficient, so most DSP chips have a PLL. However, each series varies.

1) TMS320C2000 Series:

TMS320C20x: The PLL can be ÷2, ×1, ×2, and ×4, so the external clock can be 5MHz – 40MHz.

TMS320F240: The PLL can be ÷2, ×1, ×1.5, ×2, ×2.5, ×3, ×4, ×4.5, ×5, and ×9, so the external clock can be 2.22MHz – 40MHz.

TMS320F241/C242/F243: The PLL can be ×4, so the external clock is 5MHz. TMS320LF24xx: The PLL can be adjusted by RC, so the external clock is 4MHz – 20MHz.

TMS320LF24xxA: The PLL can be adjusted by RC, so the external clock is 4MHz – 20MHz.

2) TMS320C3x Series:

TMS320C3x: There is no PLL, so the external main frequency is twice the working frequency.

TMS320VC33: The PLL can be ÷2, ×1, ×5, so the external main frequency can be 12MHz – 100MHz.

3) TMS320C5000 Series:

TMS320VC54xx: The PLL can be ÷4, ÷2, ×1-32, so the external main frequency can be 0.625MHz – 50MHz.

TMS320VC55xx: The PLL can be ÷4, ÷2, ×1-32, so the external main frequency can be 6.25MHz – 300MHz.

4) TMS320C6000 Series:

TMS320C62xx: The PLL can be ×1, ×4, ×6, ×7, ×8, ×9, ×10, and ×11, so the external main frequency can be 11.8MHz – 300MHz.

TMS320C67xx: The PLL can be ×1 and ×4, so the external main frequency can be 12.5MHz – 230MHz.

TMS320C64xx: The PLL can be ×1, ×6, and ×12, so the external main frequency can be 30MHz – 720MHz.

How to use software wait?

The DSP’s instruction cycle is fast, and when accessing slow memory or peripherals, wait states need to be added. Wait states can be hardware waits and software waits, and each series has different wait states.

1) For C2000 Series: The hardware wait signal is READY, and there is no wait when high. Software wait is determined by the WSGR register, with a maximum of 7 waits that can be added. Program memory and data memory as well as I/O can be set separately.

2) For C3x Series: The hardware wait signal is /RDY, and there is no wait when low. Software wait is determined by the bus control register’s SWW and WTCNY, with a maximum of 7 waits that can be added, but waits are not segmented, and the entire space outside the chip is valid.

3) For C5000 Series: The hardware wait signal is READY, and there is no wait when high. Software wait is determined by the SWWCR and SWWSR registers, with a maximum of 14 waits that can be added. Program memory, control program memory, and data memory as well as I/O can be set separately.

4) For C6000 Series (only for asynchronous memory or peripherals): The hardware wait signal is ARDY, and there is no wait when high. Software wait is determined by the external memory interface control register, and the timing of bus access to external memory or devices can be set, allowing for easy interface with both synchronous and asynchronous memory or peripherals.

Basic requirements for normal simulation work for DSP:

1) The power and ground connections of the DSP are correct. 2) The DSP clock is correct. 3) The main control signals of the DSP, such as RS and HOLD signals, are connected to high. 4) The watchdog of C2000 is turned off. 5) The non-maskable interrupt NMI is pulled high.

Why does CCS need to install a Driver?

CCS is an open software platform that supports different hardware interfaces, so different hardware interfaces must connect to CCS through standard Drivers.

Common issues with Driver installation?

Please read the “Installation Manual” and the Readme on the Driver disk carefully. 1) For SEED-XDS, follow the steps in the Readme to set the I/O port to 240/280/320/340. 2) For SEED-XDSPP, follow the steps in the Readme to set the I/O port to 378 or 278. 3) For SEED-XDSUSB, the target board must be connected, and follow the steps in the Readme to set the I/O port to A; after USB connection, the host will automatically activate the corresponding Driver. 4) For SEED-XDSPCI, follow the steps in the Readme to set the I/O port to 240; after inserting the PCI interface board into the host, the host will automatically activate the corresponding Driver. 5) For Simulator, different CFG files need to be selected to simulate different DSPs. 6) For C5402 DSK, set the I/O port to please read the “Installation Manual” and the Readme on the Driver disk carefully. 1) For SEED-XDS, follow the steps in the Readme to set the I/O port to 240/280/320/340. 2) For SEED-XDSPP, follow the steps in the Readme to set the I/O port to 378 or 278. Note that the type of parallel port in the host BIOS must match that in xds510pp.ini. 3) For SEED-XDSUSB, the target board must be connected, and follow the steps in the Readme to set the I/O port to 240/280/320/340; after USB connection, the host will automatically activate the corresponding Driver. 4) For SEED-XDSPCI, follow the steps in the Readme to set the I/O port to 240/280/320/340; after inserting the PCI interface board into the host, the host will automatically activate the corresponding Driver. 5) For Simulator, different CFG files need to be selected to simulate different DSPs. 6) For C5402 DSK, set the I/O port to 378 or 278. 7) For C6211/6711 DSK, set the I/O port to 378 or 278. 8) For C6201/C6701 EVM, set the I/O port to 0.

What is the purpose of the Link cmd file?

The Link cmd file is used for the positioning of DSP code. Since the compiler’s output for DSP is unpositioned, and the DSP has no operating system to locate executable code, and each customer’s DSP system configuration is different, the user needs to define the installation location of the code themselves. For C5000, the basic format is:

-o sample.out

-m sample.map

-stack 100

sample.obj meminit.obj

-l rts.lib

MEMORY {

PAGE 0: VECT: origin = 0xff80, length 0x80

PAGE 0: PROG: origin = 0x2000, length 0x400

PAGE 1: DATA: origin = 0x800, length 0x400

}

SECTIONS {

.vectors : {} >PROG PAGE 0

.text : {} >PROG PAGE 0

.data : {} >PROG PAGE 0

.cinit : {} >PROG PAGE 0

.bss : {} >DATA PAGE 1

}

How to convert an OUT file to hex file format?

The DSP development software integrates a program that can convert the executable OUT file to a format acceptable by the programmer, allowing the programmer to use this file to burn EPROM or Flash. For C2000 programs, it is DSPHEX; for C3x programs, it is HEX30; for C54x programs, it is HEX500; for C55x programs, it is HEX55; for C6x programs, it is Hex6x. For C32, the basic format is:

sample.out

-x

-memwidth 8

-bootorg 900000h

-iostrb 0h

-strb0 03f0000h

-strb1 01f0000h

-o sample.hex

ROMS {

EPROM: org = 0x900000,len=0x02000,romwidth=8

}

SECTIONS {

.text: paddr=”boot”

.data: paddr=”boot”

}

Collected Q&A Posts for DSP Engineers

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