ACROVIEW Technology, a leader in chip programming, announced the expansion of its compatible chip model list alongside the release of its new programming software. The newly added model includes STMicroelectronics’ 32-bit microcontroller SR5E1E5, which is now supported by the ACROVIEW universal programming platform AP8000.
The SR5E1E5 microcontroller series is designed to meet the enhanced digital control and high-performance analog requirements demanded by new wide bandgap power technologies (silicon carbide and gallium nitride), suitable for power conversion applications (such as onboard chargers and DC/DC converters) as well as advanced motor control (such as traction inverter applications).
Additionally, the SR5E1E5 features excellent real-time performance and safety capabilities, with the highest ASIL-D (Automotive Safety Integrity Level D) capability, secure cryptographic services (HSM, Hardware Security Module), and efficient OTA reprogramming capabilities.
All Features
• Complies with AEC-Q100 automotive grade certification standards
• The SR5 high-performance analog microcontroller has the following features
– Meets the digital and analog high-frequency control capabilities required by new wide bandgap technologies (silicon carbide and gallium nitride)
Outstanding real-time performance and functional safety features (with ASIL-D level capability)
– Built-in fast and cost-optimized OTA (Over-The-Air) reprogramming capability (equipped with built-in dual image storage)
– High-speed secure cryptographic services (HSM, Hardware Security Module)
• Core
– 2 x 32-bit Arm® Cortex®-M7 cores, equipped with double-precision floating-point units, L1 cache, and DSP instructions, running at frequencies up to 300MHz, achieving 1284 DMIPS/2.14 DMIPS/MHz per core (based on Dhrystone 2.1 standard)
– Supports separate – locked configurations, allowing for parallel operation of 2 cores or locked step operation of 1 core
– 2 DMA engines with locked step configuration
• Memory
– Up to 2MB of on-chip flash memory, supporting read-while-write
– 1920KB code flash memory, divided into two storage areas, supporting 960KB of OTA reprogramming
– 160KB HSM dedicated code flash memory
– 96KB data flash memory (64KB + 32KB dedicated to HSM)
– 488KB on-chip general SRAM
– 2 x 32KB instruction TCM + 2 x 64KB data TCM
– 256KB system RAM
– 40KB HSM dedicated system RAM
• Security: Hardware Security Module (HSM)
– Complies with cybersecurity ISO/SAE 21434 standards
– On-chip high-performance security module, supporting EVITA medium standards, equipped with dedicated RAM and flash memory
– Based on Cortex®-M0+ core, running at frequencies up to 150MHz
– Equipped with symmetric encryption hardware accelerator
• Security: Comprehensive next-generation ASIL-D safety concept
– Employs state-of-the-art safety measures at all levels of architecture to effectively achieve ISO 26262 ASIL-D functionality
– Fault Collection and Control Unit (FCCU) for collecting fault notifications and responding, with enhanced configurability
– Memory Error Management Unit (MEMU) for collecting and reporting error events in memory
– Cyclic Redundancy Check (CRC) unit
• Enhanced peripherals with fast control loop capabilities
– 12 timers
– 2 HRTIM (High-Resolution Timer) modules: 12 x 16-bit counters, resolution up to 102 picoseconds, 24 PWM channels
– 2 x 16-bit 6-channel advanced control timers, supporting up to 12 PWM channels
– 2 x 32-bit general timers, supporting up to 8 input capture/output compare/PWM or pulse counters and quadrature encoder inputs
– 4 x 16-bit general timers, supporting up to 11 PWM channels, with 2 configured in pairs
– 2 x 16-bit basic timers
– Enhanced ADC system
– 5 independent 12-bit SAR ADCs, each with 8 channels. Single mode sampling rate up to 2.5MSPS, dual mode up to 5MSPS
– 2 independent 16-bit sigma-delta ADCs
– 12-bit DAC
– 2 buffered external channels, 1MSPS
– 8 unbuffered internal channels, 15MSPS
– 8 rail-to-rail analog comparators, propagation delay 50ns
– Hardware accelerators
– 1 CORDIC for accelerating trigonometric function calculations
• Communication Interfaces
– 4 modular Controller Area Network (MCAN) modules, all supporting flexible data rate (ISO CAN-FD)
– 3 UART modules with LIN functionality
– 4 Serial Peripheral Interface (SPI) modules, 2 of which are multiplexed with I²S interfaces
– 2 I²C modules
• Advanced debugging and tracing capabilities for high-performance automotive applications
– Based on Arm® CoreSight™-600 architecture
– Debug interface: Arm® CoreSight™ JTAG (IEEE 1149.1) or SWD
– 4KB embedded trace FIFO, supporting on-chip and off-chip tracing
– Trace port for off-chip tracing: parallel trace port, configurable for 1 to 8 data lines
• Other Features
– Power efficiency management, allowing for individual power mode settings for any selected core, peripheral, or memory
– Boot Assist Flash (BAF) supports factory programming via CAN or UART serial loader
– Junction temperature range -40°C to 150°C
– Integrated power solutions
– Integrated internal SMPS voltage regulator
– 3.3V power supply and general-purpose input/output pins (GPIOs)
Internal Block Diagram
With a strong technical foundation, ACROVIEW’s self-developed AP8000 universal programmer is regarded as a benchmark programming solution in the industry. This device supports flexible one-to-one and one-to-eight configurations, providing both online and offline operating modes, and has developed dedicated programming solutions for eMMC and UFS storage chips, fully meeting the bare chip offline programming and on-board programming needs for the entire series of STMicroelectronics chips. The AP8000 consists of three core modules: host, baseboard, and adapter, and this modular design grants it exceptional compatibility and expandability. As a universal programming platform, the AP8000 not only adapts to various programmable chips on the market but also, due to its stable and efficient performance, serves as the core component of ACROVIEW’s automated IPS5800S programming system, efficiently handling large-scale chip programming tasks to meet mass production needs.
The AP8000 host features flexible connectivity options, equipped with USB and NET interfaces, allowing for easy networking of multiple programmers. Through the networking function, users can easily achieve synchronized control of multiple programmers, efficiently conducting parallel programming operations. In terms of safety, the host is equipped with an intelligent safety protection circuit that can monitor the chip placement status and circuit connection in real-time. If it detects abnormal conditions such as chip reverse insertion or short circuits, it will immediately trigger a power-off protection mechanism, fully safeguarding the safe operation of the chip and programmer. The host is internally equipped with a high-speed FPGA chip, significantly enhancing data transmission and processing efficiency, ensuring a smooth and efficient programming process. To enhance user convenience, the back of the host is equipped with an SD card slot, allowing users to store project files generated on the PC to the SD card and insert it into the slot. They can then complete file selection and loading for programming operations through the physical buttons on the programmer, achieving independent operation without a PC. This design not only reduces dependence on computer hardware configurations but also simplifies the setup process of the working environment, significantly enhancing operational flexibility.
In terms of expandability and compatibility, the AP8000 adopts a modular design of baseboard and adapter, effectively extending the functional boundaries of the host. Currently, the device has achieved support for products from all major semiconductor manufacturers, covering well-known brands such as HOLTER, Fibocom, BOYAMICRO, NOVATEK, and Megawin. It supports a wide range of device types, including NAND, NOR, MCU, CPLD, FPGA, EMMC, etc., and is fully compatible with various industry-standard file formats such as Intel Hex, Motorola S, Binary, and POF, providing users with a one-stop, all-scenario chip programming solution.
Company Introduction
About STMicroelectronics: STMicroelectronics (ST) was established in 1987, formed by the merger of Italy’s SGS Microelectronics and France’s Thomson Semiconductors. In May 1998, it was renamed STMicroelectronics Ltd. STMicroelectronics is one of the largest semiconductor companies in the world and a leading provider of semiconductor solutions, offering innovative solutions for electronic device manufacturers across various application fields. With a wealth of technology, design capabilities, and intellectual property portfolio, strategic partnerships, and manufacturing strength, STMicroelectronics aims to be the undisputed industry leader in multimedia convergence and power applications.
About ACROVIEW Technology: ACROVIEW Technology is a national-level specialized and innovative “little giant” enterprise engaged in the research, production, and sales of semiconductor chip testing and programming equipment. The company is committed to empowering the entire industry chain customers, including Fabless, IDM, OSAT, wafer fabs, and end-device companies, through innovative semiconductor testing technologies and solutions. ACROVIEW’s pioneering fully automated aging test ABI (Auto Burn-In) system greatly enhances the aging test efficiency of customer chips and reduces Per DUT testing costs. Additionally, it provides equipment products and solutions for all stages from PSV, CP, FT, BI, SLT, to programming. We perfectly integrate the leading advantages of product technology, system-level expertise, and a globally laid-out R&D and sales service network to create value for customers to gain a competitive edge in the market.
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