Nios II is a configurable 16/32-bit RISC processor that, combined with a rich set of peripheral-specific instructions and hardware acceleration units, can provide extremely flexible and powerful SOPC systems at a low cost, allowing developers to integrate according to actual needs. All mainstream FPGA devices from Altera support Nios II. By combining the LCD driver with Nios II, a scalable and general-purpose IP core can be obtained, thus solving the driving differences between different models of LCD screens.
1 Nios II Soft Core Processor and SOPC
The design of the Nios II core occupies less than half of the FPGA resources and can compute more than double the information. The Nios II embedded processor has a performance exceeding 200 DMIPS, with 32-bit data and addresses, 32-bit instructions, 32 external interrupt sources, and 32 general-purpose registers. Nios II supports dozens of peripheral options, allowing developers to choose the appropriate peripherals to obtain the best combination of processor, peripherals, and interfaces.
Now, complex functions such as MCU, DSP, PCI bus control, and various control algorithms can be implemented on a single FPGA chip. The density of FPGA chips has reached millions of gates, and with the increase in FPGA chip density and the continuous update of EDA development tools, implementing SoC using FPGA devices has become possible. This technology is known as embedded SOPC technology. SOPC technology combines features of ASIC-based system-on-chip design with template-based design characteristics, offering reconfigurability and efficient automated design methods. Altera’s Nios II provides designers with an FPGA-optimized embedded processor and a comprehensive solution for SOPC design.
The Nios II processor has a complete software development suite, including an Integrated Development Environment (IDE), compiler, MC debugger, TCP/IP stack, and Real-Time Operating System (RTOS). Designers can use the SOPC Builder system development tool in Altera QUARTUS II development software to create custom CPU and peripheral circuits, achieving the desired processor system for design.
Using the SOPC Builder development tool to create a dedicated processor system requires selecting the internal resources of the SOPC embedded processor chip and software design. The SOPC Builder tool configures a highly integrated SOPC system’s embedded processor chip by loading the definitions of the Nios II soft core and peripheral interfaces.
Figure 1 shows an Nios II processor in an LCD display SOPC system, with main ports including reset signals, global input clocks, and several I/O ports. Since Nios II is implemented within the FPGA chip, it can be connected to external devices through FPGA pins or directly to other circuits within the FPGA chip. Unused resources within the FPGA can still be configured for use as other modules, thus achieving SoC integration of the system.
2 LCD Controller Selection
The LCD display module used here is the YM12864J, which has integrated the SED1330 as the controller for the LCD screen. Compared to similar products, its main features include:
(1) A powerful I/O controller;
(2) Simple instructions;
(3) 8-bit parallel I/O ports;
(4) Mixed display of text and graphics.
The I/O interface of the YM12864J is shown in Table 1.
3 FPGA and LCD Interface Circuit
The selected LCD display has already been integrated with the controller, making the peripheral circuit relatively simple, consisting only of the connection between the FPGA chip and the LCD control module. Two solutions can be considered here: the first is to treat the LCD display module as external memory, using the data and address buses of Ext_Shared_Bus to control it; the second is to treat the LCD interface as a regular external device GPIO, controlling the LCD’s data and read/write enable through I/O port operations and chip select. Generally, for less complex systems, treating external devices as ordinary PIO is a simpler method, so here we adopt the second solution. The interface circuit between Nios and the LCD module is shown in Figure 2.
4 System Software Design
After powering on and resetting the system hardware, the initialization function will configure the hardware layer, including the direction configuration of the I/O ports. After correctly initializing the system hardware layer, data can be sent directly to the SED1330 display buffer via Nios. The application layer functions will send control commands and display data to the LCD controller, and then the LCD screen will display the content the user wants to show. The application layer of this design has developed some basic display functions that can display characters, Chinese characters, and simple graphics. Users only need to call some display functions to display content, and the software design process of the system is shown in Figure 3.
The role of the initialization function is to send initialization commands to the LCD display controller. The method for sending instructions is as follows: according to the I/O configuration, first send the command data to the I/O port connected to the command port of the SED1330 controller, and then sequentially send the parameters of that command to the data port address. The initialization code is as follows:
This program mainly includes the header file LCD.h and the main program hello_world.c.
The main program of the header file lcd.h is as follows:
Once all code design is complete and successfully debugged in simulation, the complete project is compiled in QUARTUS II software, which means compiling the hardware configuration information and code software information together and ultimately downloading it to the EP2C8T144C8 chip via a parallel cable, resulting in a clear and stable system display output.
5 Conclusion
This article utilizes SOPC technology to implement a design scheme for an LCD display system based on the Nios II embedded processor. From the design of the scheme, it can be seen that the flexibility and superiority of using the Nios II embedded soft core processor and the Nios II IDE integrated development environment for software and hardware development. Moreover, the design ideas and example development in this article have general applicability in solving the driving differences between different models of LCD screens.
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