The Field Programmable Gate Array (FPGA) is at the core of many prototypes and small to medium-sized products. The main advantages of FPGAs are flexibility during the development process, a simple upgrade path, faster time to market, and relatively low costs. A key disadvantage is complexity, as FPGAs often contain complex System on Chip (SoC) designs.
This complexity imposes stringent requirements on power supplies. To meet these challenges, power supplies need multiple outputs and a combination of switching regulators for improved efficiency and linear regulators for clean power.
This article describes the special power requirements of FPGAs, explains how to design power supplies for these intelligent chips, and then reviews the selection of power modules for FPGA applications.
Calculating System Power
Powering FPGAs seems like powering the entire system. Power design engineers face the challenge of providing 3 to 15 voltage rails (and sometimes even more); and this is just the beginning. FPGAs are typically manufactured using the latest wafer fabrication technologies that require low core voltages, but the power supply must also power multiple rails for special modules and circuits, provide multiple voltage levels, deliver extra current for high-power modules, and meet the requirements for noise-sensitive components.
To complicate matters further, even FPGAs from the same manufacturer can vary significantly, making it crucial for engineers to select the best power supply for each chip. This selection depends on factors such as the voltage and power requirements of each power rail, the sequencing requirements of the power rails, and the system power management needs.
The first step in designing FPGA power supplies is to identify each voltage rail and its requirements. FPGA vendors typically provide a “pin list” that specifies the voltage levels for each power pin connected to the device’s voltage rails. For example, Table 1 shows some voltage rails of Altera’s Stratix IV GX FPGA.
Table 1: Subset of Voltage Rails for Altera Stratix IV GX. (Provided by Altera)
As shown in Table 1, the voltage rails of the FPGA operate at several different voltages depending on the powered modules. Requirements typically include core (for powering the internal logic array), I/O (to drive I/O buffers that can operate at different voltages), phase-locked loop (PLL) (for powering the PLL core), and transceivers (for powering digital and analog circuits for transmitters and receivers).
Once the individual voltage rails have been identified, the next step is to calculate the current consumption for each rail sequentially. The current consumption of shared rails should be added to the rail being analyzed to derive the total for that rail. FPGA manufacturers often provide online calculators for this purpose. Next, engineers should sum the power consumption of all components constituting the FPGA to accurately estimate the total power consumption of the chip.
After calculating the power consumption, the next step is to check the voltage variation tolerance and maximum voltage ripple specifications for each power rail. These parameters can usually be found in the FPGA’s datasheet.
Load regulation specifications determine the range (in mV) within which the voltage regulator output may deviate due to load changes. If the power supply comes from a switching DC-DC voltage converter (“switching regulator”), the typical specification for load regulation is ±5 mV. If the voltage rail is specified at 1.2 V, this is just a 0.4% deviation.
Voltage ripple is measured in mV peak-to-peak, and its magnitude depends on the design of the regulator powering the specific rail being analyzed. Output filtering significantly affects voltage (and current) ripple performance. (See TechZone article “Capacitor Selection is Key to Good Regulator Design.”) Most FPGAs can tolerate voltage ripple of up to 2% or higher, which is well within the capabilities of modern switching regulators.
Switching Regulator or Linear Regulator?
The next step in the FPGA power design process is to decide whether a specific power rail should be powered by a switching regulator or a linear regulator. Special attention is needed for powering analog power rails for noise-sensitive circuits such as PLLs and transceiver circuits. Excessive noise on these rails can affect circuit performance.
Linear regulators provide ripple-free power, fast response times, are easier to use, and take up less space than switching devices. They are a good choice for noise-sensitive PLL and transceiver rails. The main drawback is inefficiency, especially when the output voltage is much lower than the input voltage.
Switching regulators are a better choice for higher power rails because their higher efficiency is more important than lower noise. They are ideal for powering the digital core logic and I/O of FPGAs, where current demands can easily reach several tens of amps. The drawback of switching regulators is that they are more complex, larger, and require more external components.
The resulting power system can be somewhat complex, including multiple switching and linear regulators in a “power tree” (Figure 2).
Figure 2: FPGA Power System Composed of Switching and Linear Regulators. (Provided by Altera)
FPGA Power Modules
The power for FPGAs typically includes a combination of switching and linear regulators to provide different voltages and stable power with reasonable efficiency. Designing such power supplies is not easy, but things can become simpler by basing the circuitry on power modules that integrate multiple switching and linear regulators into a single chip.
For example, Maxim’s MAX8660 power module includes four switching regulators (operating at 2 MHz, allowing for the use of small inductors) and four linear regulators. The switching regulators automatically switch from pulse-width modulation (PWM) to light-load operation to reduce operating current and extend battery life.
This device provides output voltages of 0.725-3.3 V (0.4-1.6 A) for switching regulators and 1.7-3.3 V (30-500 mA) for low-dropout (LDO) linear regulators, all with an input range of 2.6 to 6 V.
The chip also integrates power management capabilities and features such as output on/off control, low power detection, reset output, and a two-wire I2C serial interface.
Intersil offers the ISL9440 for small FPGA applications. This chip combines three switching regulators and one LDO linear regulator. Each output is adjustable down to 0.8 V, and the device is powered by a supply voltage of 4.5-24 V.
ISL9440 provides internal soft-start and independent enable inputs in a compact 5 x 5 mm QFN package to simplify power rail sequencing. The chip uses internal loop compensation to minimize external components, leading to a compact design and lower overall solution costs.
Texas Instruments (TI) also offers power modules that combine the efficiency of switching regulators with the noise-free power of linear regulators. For example, the LM26480 (Figure 3) integrates two 1.5 A buck (“step-down”) switching regulators and two 300 mA linear regulators. The device is powered by a supply voltage of 2.8 to 5.5 V, with the first switching regulator providing 0.8-2 V at 1.5 A, and the second providing 1.0-3.3 V at 1.5 A. The 2 MHz switching regulator operates with an efficiency of up to 96%. The linear regulators provide 1-3.5 V at up to 300 mA.
Figure 3: Texas Instruments’ LM26480 Integrates Two Switching Regulators and Two Linear Regulators.
Welcome to join the Zhixin Technology FPGA WeChat Learning Group, where there is a group of excellent FPGA engineers, students, and teachers. The atmosphere for FPGA technology exchange and learning is strong, sharing and helping each other, so invite your friends to join!
Click to See Your Best Look