This article serves as a personal investment record for individual learning and review. Friends who read this article should not trade based on any varieties mentioned. All varieties mentioned carry the risk of significant losses, which is not alarmist but a reality experienced by most of my varieties during this bear market from 2022 to 2024. The stock market has risks, and investment should be cautious!In 2016, Apple released the revolutionary headphone product AirPods,leading to rapid development in the Bluetooth TWS headphone industry. Many chip design companies have entered this field, and a previous article introduced the leading domestic TWS headphone chip company, Actions Technology.Today, let’s take a look at another company, Actions Technology, which can trace its history back to the establishment of Zhuhai Actions Semiconductor in 2001.To conclude:From a business model perspective, the company, as a chip design enterprise, primarily produces low-power Bluetooth audio chips for TWS headphones, Bluetooth speakers, smartwatches, and other products, facing fierce market competition. The business model is average.From the management perspective, the current chairman and general manager, Mr. Zhou, has been with the company since the previous Zhuhai Actions and has a relatively stable management team. However, the controlling shareholder is the Taiwanese Yeh family, which controls Realtek. Mr. Zhou, as a professional manager, holds a small percentage of shares, possibly around 2%. From past experiences, Actions Technology, established in 2015, currently has revenue five times that of this company, and its R&D personnel are three times as many. In the fierce market competition, the management team of this company is clearly not the most outstanding in the industry. The historical performance of the management team is average.Current stock prices, based on the 2024 performance of 652 million in revenue and 107 million in net profit, show a revenue PS of over 13 times and a PE of about 80 times. This price is clearly not cheap. Even considering the first quarter’s performance, the dynamic PS is about 11.8 times, and the dynamic PE is about 61 times, still not cheap. The current price already reflects the expectations of high growth this year and the concept of AI explosion at the edge.1. Company OverviewThe following is from the company’s official website, providing a detailed introduction.
Actions Technology Co., Ltd. was established in 2014 and listed on the Sci-Tech Innovation Board in 2021. Headquartered in Zhuhai, it has branches in Shenzhen, Hefei, Shanghai, Chengdu, Hong Kong, and other locations. Actions Technology is a leading low-power AIoT chip design manufacturer in China, focusing on the R&D, design, and sales of mid-to-high-end smart audio SoC chips, specializing in providing professional integrated chips for wireless audio, smart wearables, and smart interaction in the AIoT field. The company’s main products include Bluetooth audio SoC chip series, portable audio and video SoC chip series, and edge AI processor chip series, widely used in Bluetooth speakers, wireless home theaters, smartwatches, wireless microphones, wireless transceiver dongles, Bluetooth headsets, wireless gaming headsets, Bluetooth voice remote controls, and low-power edge AI processors.
Building on nearly 20 years of R&D experience, Actions Technology excels in providing high-quality and low-latency wireless audio experiences under low power consumption. The company focuses on high-quality audio full signal chain technology centered around high-performance audio ADC/DAC, voice pre-processing, audio codec, and audio post-processing; as well as low-latency wireless connection technology centered around Bluetooth RF, baseband, and protocol stack technology. In line with the development trend of artificial intelligence, starting from high-end audio chips, the company integrates low-power AI acceleration engines and gradually upgrades to a CPU, DSP, and NPU (Neural Processing Unit) three-core heterogeneous AI computing architecture to create low-power edge AI computing power. The company specializes in highly integrating RF communication, power management, mixed-signal audio, CPU, DSP, and storage units into a single-chip SoC. Actions Technology has accumulated a relatively complete and advanced independent intellectual property, enhancing the value of SoCs through the integration of software development kits and core algorithms, helping customers lower the threshold for chip development and mass production, allowing terminal products to be quickly brought to market.
To understand the company’s situation, we need to start from its predecessor, Zhuhai Actions Semiconductor. Zhuhai Actions can be considered the training ground for the Zhuhai semiconductor industry.
Zhuhai Actions (Actions Semiconductor) is an important enterprise in the history of China’s chip industry development, closely linked to the entrepreneurial trajectory of its founder, Zhao Guangmin, and reflecting the rise and transformation of China’s semiconductor industry. The following is a summary of key information:
1) Founder and Early Years (1993-2001)
The founder, Zhao Guangmin, graduated from Xi’an Jiaotong University in the early 1980s and worked for several semiconductor companies. In 2001, he founded Zhuhai Actions Semiconductor and served as the first CEO.
Early Foundation: Actions was originally established in 1993 as Zhuhai Yali Electronics (the first integrated circuit design company in Zhuhai), where Zhao Guangmin accumulated technical and management experience. In 2001, he led the Yali team to transition to the newly established Zhuhai Actions Semiconductor.
The company initially focused on digital energy meter chips and other products, breaking international technology monopolies. The team formed a technical reserve in mixed-signal design and low-power SoC.
2) Technological Breakthroughs and Market Glory (2002-2006)
Explosive Growth of MP3 Chips
In 2002, Actions launched its first MP3 main control SoC chip, quickly capturing the market with its high cost-performance ratio. In 2004, chip shipments reached 1 million units, exceeding 10 million units in 2005, and breaking 100 million units in 2006, dominating 80% of the global MP3 chip market at its peak, earning the title “King of MP3” in the industry.
International Cooperation: Supplied chips for Apple’s iPod (each iPod used three Actions chips) and replaced Philips as a supplier for international brands like Cowon.
NASDAQ Listing (2005)
In December 2005, Actions was listed on NASDAQ under the code “ACTS,” raising $72 million and becoming one of the first Chinese chip companies to go public in the U.S.
3) Challenges and Transformation (2006-2014)
Founder Departure and Patent Disputes
In early 2006, Zhao Guangmin suddenly announced his departure, speculated to be due to management conflicts with the Taiwanese controlling shareholder (the Yeh family), although officially stated as “retirement.” At the same time, Actions faced patent litigation with U.S. SigmaTel, with some products ruled as infringing, increasing operational pressure.
Market Shrinkage and Strategic Errors
After the MP3 market declined, Actions attempted to enter the tablet chip market but failed, resulting in consecutive losses. In 2013, the net loss reached $9.2 million, and the stock price remained low for a long time.
Delisting and Restructuring (2016)
Due to low valuation and high costs of maintaining listing, Actions delisted from NASDAQ in 2016. In the same year, its core assets were restructured into Actions Technology, shifting focus to the Bluetooth audio chip and wearable device chip markets.
4. Actions Technology’s Continuation and Industry Impact
The Rise of Actions Technology
Building on the technological legacy of Actions, the company focuses on mid-to-high-end smart audio SoC chips. It was listed on the Sci-Tech Innovation Board in 2021, with a market value exceeding 10 billion yuan on its first day, achieving revenue of 520 million yuan in 2021, with net profit growing by 248.5%.
Technological Advantage: In 2020, it ranked second in the global mid-to-high-end Bluetooth speaker chip market, second only to Qualcomm.
The “Huangpu Military Academy” Effect of Actions
Actions has cultivated a large number of talents for the Zhuhai chip industry, leading to the emergence of several listed companies:
Allwinner Technology (tablet computer chips): Founded in 2007 by former Actions executives, listed on the Shenzhen Stock Exchange in 2015.
Jieli Technology/Zhongke Lanxun (TWS headphone chips): Listed in 2022, with annual shipments exceeding 800 million units.
Yingjixin/Zhirong Technology (power management chips): IPO on the Sci-Tech Innovation Board in 2022, with founding teams all from Actions.
2. Management Team Introduction
The controlling shareholder of the company remains the Taiwanese Yeh family, which is also a shareholder of Taiwanese semiconductor company Realtek. The early Bluetooth technology of Actions Technology also originated from Realtek.Mr. Zhou Zhengyu is the legal representative of Actions Technology,and the following is Mr. Zhou’s resume and technical background introduction:
Mr. Zhou Zhengyu,entered the Department of Radio Engineering (now the School of Information and Electronics) at Zhejiang University in 1983, obtaining both bachelor’s and master’s degrees. He then studied at the University of Southern California’s Viterbi School of Engineering, majoring in signal and image processing, earning a Ph.D. Subsequently, in1999, he began his entrepreneurial career in Silicon Valley, founding or operating companies such asNetRidium Communications,Pictos (merger and integration operations), and Mavrix Technology.In 2010, he joined Zhuhai Actions,and in 2014, he founded the subsidiary Actions Technology, serving as chairman and CEO of Actions Technology to this day.
I found that Mr. Zhou is also a junior of Mr. Duan Yongping, both from the same department. Mr. Duan entered Zhejiang University in 1977, and Mr. Zhou was already graduated when he enrolled.
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Previous Positions:
- Senior engineer and R&D manager for Rockwell Semiconductor (later renamed Conexant) in modem and ADSL product development.
- Expert in ITU standard organizations.
- Vice President of R&D for ESS Communication Division and Senior Vice President of CMOS Image Sensor Division at NetRidium Communication Inc. (later acquired by NASDAQ-listed ESS Technology Inc.).
- Founder of Mavrix Technology Inc. and Shanghai Mavrix Electronics Technology Co., Ltd.
- After Shanghai Mavrix Electronics Technology Co., Ltd. was acquired by NASDAQ-listed Actions Semiconductor [NASDAQ:ACTS], served as Senior Vice President.
- CEO of Actions Integrated Circuit Design Co., Ltd.
- From 2014 to July 2020, served as executive director and general manager of Actions Technology.
- Since July 2020, has served as chairman, general manager, and core technical personnel of Actions Technology.
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Main Career and Positions:
- Chairman of Kode Industrial Co., Ltd.
- Chairman of West Germany Organic Chemical Products Co., Ltd.
- Chairman of Hongyi International.
- Chairman of Jinglian Electronics Co., Ltd.
- Chairman of Jingji Computer Co., Ltd.
Technical Background Introduction
Mr. Zhou Zhengyu has rich experience and a solid technical background in integrated circuit design. He has held senior management and technical positions in several well-known companies, accumulating extensive R&D and management experience. Especially during his tenure as CEO of Actions Integrated Circuit Design Co., Ltd. and Actions Technology, he led and promoted the company’s R&D and innovation in the field of smart audio SoC chips.
3. Company Performance
Actions Technology was listed on the Sci-Tech Innovation Board of the Shanghai Stock Exchange on November 29, 2021, issuing 30.5 million shares at a price of 42.98 yuan, selling 25% of its equity and raising 1.31 billion yuan. After the listing, the total share capital reached 122 million shares. Since its listing, revenue has grown from 361 million yuan in 2019 to 652 million yuan in 2024, an increase of 1.8 times. Net profit has grown from 55 million yuan to 107 million yuan, an increase of 1.95 times.
Actions Technology’s total dividends from 2022 to 2024 were less than 90 million yuan, and the cumulative dividends since listing have reached 12.32 billion yuan, with a stock dividend of 2 shares for every 10 shares in 2023. Shareholders who subscribed for new shares at the IPO, if they held their shares until now, would have received cumulative dividends of about 22 million yuan (calculated as 1/4 of total dividends), and their holdings would have increased to 36.6 million shares. Based on the closing price of 59.9 yuan on July 8, 2025, the market value would be approximately 2.19 billion yuan. Adding the dividends of 22 million yuan, the total would be about 2.2 billion yuan.
Investing 1.31 billion yuan has turned into 2.19 billion yuan in 5 years, a 1.67 times increase, with an annualized return of about 10%. There were significant drops in between, with the stock price falling to only 1/4 of the opening price. Looking at the 5-year dimension, the growth in returns is basically consistent with the growth in net profit, slightly lower. It must be said that the valuation at the time of listing was still a bit high. If one had bought at the highest price on the day of listing, they would still not have broken even. Therefore, to profit in the stock market, one must wait for a good price to buy in.
Let’s examine whether the company’s revenue can generate real money, typically using two ratios. One is the cash received from sales of goods and services divided by total operating revenue; generally, this ratio should be greater than 1, indicating real income that can be received. The second is the net cash flow from operating activities divided by net profit; this ratio should also be greater than 1, indicating that real money has been earned.We see that Actions Technology’s average for these two ratios is greater than 1, indicating that the company is indeed making real money.
The number of R&D personnel in the company has consistently remained above 200, with slow growth. R&D personnel are the core asset of semiconductor design companies, and their number represents the company’s R&D capability. However, with the rising salary levels of semiconductor professionals in recent years, having too many R&D personnel can also increase the company’s cost and expense pressure.
The overall situation of the company is basically as described. Below is an excerpt from a speech by Mr. Zhou from the Actions Technology website, introducing the company’s advantages in AI computing power. Interested readers can continue reading.Dr. Zhou Zhengyu “Actions Intelligence: The Future of Edge AI Audio Chips”
Dr. Zhou Zhengyu stated: In the widespread application of edge AI to generative AI, different AI applications have significantly different demands for computing resources, and many edge AI applications are specialized applications that do not require large models and high computing power. Especially in the AIoT field represented by voice interaction, audio processing, predictive maintenance, and health monitoring.
Actions Technology aims to achieve high energy-efficient AI computing power on battery-driven small to medium model machine learning IoT devices
In battery-driven IoT devices such as portable and wearable products, Actions Technology is committed to achieving TOPS-level AI computing power at milliwatt-level power consumption to meet the low power and high energy efficiency requirements of IoT devices. For wearable products (headphones and smartwatches), the average power consumption is between 10mW-30mW, with storage space below 10MB, which defines the resource budget for low-power edge AI, especially for wearable devices.
Dr. Zhou Zhengyu pointed out that “Actions Intelligence” is a strategy proposed for the implementation of battery-driven edge AI, focusing on battery-driven low-power audio edge AI applications with model sizes below 10 million parameters (10M), aiming to provide general AI computing power of 0.1-1 TOPS under power consumption between 10mW-100mW. In other words, “Actions Intelligence” will challenge the target of 10 TOPS/W-100 TOPS/W AI computing power efficiency. According to ABI Research, the edge AI market is rapidly growing, with an estimated 4 billion edge AI devices based on small to medium models by 2028, with a compound annual growth rate of 32%. By 2030, it is expected that 75% of such AIoT devices will adopt high energy efficiency dedicated hardware.
Existing general CPU and DSP solutions, while having excellent algorithm flexibility, fall far short of achieving the above targets in terms of computing power and energy efficiency. According to public data from ARM and Cadence, using the same 28/22nm process, the ARM A7 CPU at a running frequency of 1.2GHz can achieve a theoretical computing power of 0.01 TOPS, requiring 100mW of power, resulting in an ideal energy efficiency ratio of only 0.1 TOPS/W; the HiFi4 DSP at 600MHz can achieve a theoretical computing power of 0.01 TOPS, requiring 40mW of power, resulting in an ideal energy efficiency ratio of 0.25 TOPS/W. Even specialized neural network accelerators (NPU) IP can significantly improve energy efficiency, but still only reach 2 TOPS/W.
The fundamentally poor energy efficiency of these traditional technologies stems from the conventional von Neumann computing architecture. Traditional von Neumann computing systems adopt a separate architecture for storage and computation, leading to bottlenecks known as the “memory wall” and “power wall,” severely restricting the improvement of system computing power and energy efficiency.
In a von Neumann architecture, the computing unit must first read data from memory, and after computation, write it back to memory. With the development of the semiconductor industry and the differences in demand, processors and memory have followed different technological paths. Due to differences in technology, packaging, and demand, the data access speed of memory cannot keep up with the data processing speed of processors, creating a situation where data transmission is like being in a huge funnel; no matter how much the processor pours in, the memory can only “drip feed.” The narrow data exchange path between the two and the resulting high energy consumption create a “memory wall” between storage and computation.
Moreover, under the traditional architecture, the power consumption required to transfer data from memory units to computing units is many times that of the computation itself, resulting in a very low proportion of energy and time actually used for computation. The frequent migration of data between memory and processors leads to severe transmission power consumption issues, known as the “power wall.”
SRAM-based in-memory computing is currently the best solution for low-power edge AI
Dr. Zhou Zhengyu stated that the method to mitigate or eliminate the “memory wall” and “power wall” issues is to adopt a Computing-in-Memory (CIM) structure. The core idea is to move some or all of the computation into storage, allowing storage units to have computing capabilities, so that data does not need a separate computing unit to complete calculations, but rather is completed within the storage unit, eliminating data access delays and power consumption, representing a true integration of storage and computation. Additionally, since computation relies entirely on storage, finer granularity of parallelism can be developed, significantly enhancing performance, especially energy efficiency.
The foundation of machine learning algorithms is a large number of matrix operations, which are suitable for distributed parallel processing, making in-memory computing very suitable for AI applications.
To perform computations in storage, the choice of storage medium is key to cost. Single-chip supremacy is the goal; Actions Technology aims to integrate the computing capabilities of low-power edge AI with other SoC modules into a single chip. Therefore, special process DDR RAM and Flash are not considered. Instead, standard SoC-compatible CMOS processes using SRAM and emerging NVRAM (such as RRAM or MRAM) come into view. SRAM technology is very mature and can be upgraded alongside advanced processes, offering fast read/write speeds, high energy efficiency, and unlimited read/write cycles. The only drawback is lower storage density, but for the vast majority of edge AI computing power needs, this drawback will not be a barrier. In the short term, SRAM is the best technical path for creating high energy efficiency in low-power edge AI devices and can be quickly implemented without mass production risks.
In the long term, emerging NVRAM such as RRAM, due to its higher density than SRAM and lower read power consumption, can also be integrated into SoCs, providing imaginative space for in-memory computing architectures. However, RRAM technology is not yet mature, and large-scale mass production still carries certain risks, with the most advanced process only reaching 22nm and a fatal flaw of limited write cycles (exceeding which can cause permanent damage). Therefore, Dr. Zhou Zhengyu anticipates that in the future, when RRAM technology matures, a hybrid technology of SRAM and RRAM may become the best technical path, where frequently written AI computations can be implemented based on SRAM’s CIM, while infrequently or limited write AI computations can be implemented using RRAM’s CIM. This hybrid technology is expected to achieve greater computing power and higher energy efficiency ratios.
Actions Technology innovatively adopts mixed-signal design to achieve SRAM-based in-memory computing (CIM)
There are two mainstream implementation methods for SRAM-based CIM circuits publicly available in the industry: one is to implement computing functions using digital circuits as close to SRAM as possible; since the computing unit does not actually enter the SRAM array, this can only be considered a near-storage technology. The other approach is to utilize some characteristics of analog devices for simulated computation within the SRAM medium. Although this technology path achieves true CIM, it also has obvious drawbacks. On one hand, the precision of simulated computation suffers, and consistency and mass production reliability cannot be guaranteed; the same chip may not ensure the same output results under different times and environments. On the other hand, it must rely on ADC and DAC to complete information exchange between CIM based on simulated computation and other digital modules, leading to many limitations in overall data flow arrangement and interface interaction design, making it difficult to improve operational efficiency.
Actions Technology innovatively adopts a mixed-signal circuit based on SRAM to implement CIM, using customized analog designs to achieve digital computing circuits within the SRAM medium, thus achieving true CIM while ensuring computational accuracy and mass production consistency.
Dr. Zhou Zhengyu believes that Actions Technology’s choice of the mixed-mode SRAM-based CIM (MMSCIM) technology path has the following significant advantages: First, it has a higher energy efficiency ratio than purely digital implementations and is almost equivalent to that of purely analog implementations; Second, it does not require ADC/DAC, ensuring the precision, high reliability, and mass production consistency inherent in digital technology; Third, it is easy to upgrade processes and design transitions between different fabs; Fourth, it is easy to enhance speed and optimize performance/power/area (PPA); Fifth, it adapts to sparse matrices, further saving power and enhancing energy efficiency ratios.
For high-quality audio processing and voice applications, MMSCIM is the best future low-power edge AI audio technology architecture. By reducing the need for data transmission between memory and storage, it can significantly reduce latency, enhance performance, and effectively reduce power consumption and heat generation. For empowering AI in battery-powered IoT devices that pursue extreme energy efficiency, Actions Technology’s MMSCIM technology is the best solution for realizing edge AI.
Dr. Zhou Zhengyu officially announced the roadmap for Actions Technology’s MMSCIM technology, showing that: 1. The first generation (GEN1) MMSCIM has been implemented in 2024, using a 22nm process, with each core providing 100 GOPS of computing power and an energy efficiency ratio of up to 6.4 TOPS/W @INT8; 2. By 2025, Actions Technology will launch the second generation (GEN2) MMSCIM, which will triple the performance compared to the first generation, with each core providing 300 GOPS of computing power, directly supporting Transformer models, and improving the energy efficiency ratio to 7.8 TOPS/W @INT8; 3. By 2026, a new 12nm process will be introduced for the third generation (GEN3) MMSCIM, with each core achieving high computing power of 1 TOPS, supporting Transformers, and further enhancing the energy efficiency ratio to 15.6 TOPS/W @INT8.
Each generation of MMSCIM technology can enhance total computing power through multi-core stacking; for example, a single core of MMSCIM GEN2 provides 300 GOPS of computing power, which can be combined with four cores to achieve computing power exceeding 1 TOPS.
Actions Technology officially releases a new generation of edge AI audio chips based on MMSCIM
Actions Technology successfully implemented the first generation of MMSCIM, achieving 0.1 TOPS of computing power at 500MHz, with an energy efficiency ratio of 6.4 TOPS/W. Benefiting from its adaptability to sparse matrices, if there is reasonable sparsity in the model (i.e., a certain proportion of parameters are zero), the energy efficiency ratio can be further improved, potentially reaching or exceeding 10 TOPS/W. Based on this core technological innovation, Actions Technology has created the next generation of low-power, high-computing power, and high energy efficiency edge AI audio chip platform.
Dr. Zhou Zhengyu officially announced the new generation of edge AI audio chips based on MMSCIM, consisting of three chip series:
The first series is ATS323X, aimed at the low-latency private wireless audio field;
The second series is ATS286X, aimed at the Bluetooth AI audio field;
The third series is ATS362X, aimed at the AI DSP field.
All three series of chips adopt a CPU (ARM) + DSP (HiFi5) + NPU (MMSCIM) three-core heterogeneous design architecture. Actions’ R&D personnel have integrated MMSCIM and advanced HiFi5 DSP to form the “Actions Intelligence NPU (AI-NPU)” architecture, achieving a high elasticity and high energy efficiency NPU architecture through collaborative computing. In this AI-NPU architecture, MMSCIM supports basic general AI operators, providing low-power and high-computing power. Meanwhile, due to the continuous emergence of new models and operators in AI, emerging special operators not covered by MMSCIM will be supplemented by HiFi5 DSP. All series of edge AI chips can support AI models with up to 1 million parameters on-chip and can be expanded to support AI models with up to 8 million parameters through off-chip PSRAM. Additionally, Actions Technology has developed a dedicated AI development tool called “ANDT” for the AI-NPU, which supports industry-standard AI development processes such as TensorFlow, HDF5, PyTorch, and Onnx. It can automatically split the given AI algorithm reasonably between CIM and HiFi5 DSP for execution. ANDT is an important tool for building Actions’ low-power edge audio AI ecosystem, enabling developers to easily integrate algorithms and rapidly complete product deployment.
According to the comparison of energy efficiency ratios of the first generation MMSCIM and HiFi5 DSP announced by Dr. Zhou Zhengyu, when both Actions Technology’s GEN1 MMSCIM and HiFi5 DSP operate at 500MHz using the same 717K parameter Convolutional Neural Network (CNN) model for environmental noise reduction, MMSCIM can reduce power consumption by nearly 98% compared to HiFi5 DSP, achieving a 44-fold improvement in energy efficiency ratio. In tests using a 935K parameter CNN model for speech recognition, MMSCIM can reduce power consumption by 93% compared to HiFi5 DSP, achieving a 14-fold improvement in energy efficiency ratio.
Additionally, in tests using more complex network models for environmental noise reduction, when running Deep Recurrent Neural Network models, MMSCIM can reduce power consumption by 89% compared to HiFi5 DSP; when running Convolutional Recurrent Neural Network models, it can reduce power consumption by 88% compared to HiFi5 DSP; and when computing Convolutional Deep Recurrent Neural Network models, it can reduce power consumption by 76% compared to HiFi5 DSP.
Finally, under the same conditions, when computing a certain CNN-Con2D operator model, the measured AI computing power of GEN1 MMSCIM can be 16.1 times higher than that of HiFi5 DSP.
In summary, the latest generation of edge AI audio chips based on MMSCIM launched by Actions Technology has profound implications for the industry and is expected to lead a new trend in edge AI technology.
Actions Technology’s Actions Intelligence Accelerates the Rapid Development of the AI Ecosystem
From ChatGPT to Sora, various cloud-based large models are continuously refreshing people’s expectations of AI. However, the road to AI development remains long, and the transition from cloud to edge will be a new development trend, marking the beginning of the second half of the AI world.
With advantages such as low latency, personalized services, and data privacy protection, edge AI plays an increasingly important role in IoT devices, showcasing more possibilities in manufacturing, automotive, consumer goods, and other industries. The release of Actions Technology’s new products based on SRAM’s mixed-signal CIM technology marks the first step in creating low-power edge AI computing power, successfully integrating AI acceleration engines into products and launching CPU + DSP + NPU three-core AI heterogeneous edge AI audio chips.
Finally, Dr. Zhou Zhengyu sincerely hopes to make AI truly accessible everywhere through the “Actions Intelligence” strategy. In the future, Actions Technology will continue to increase investment in edge device edge computing power R&D, achieving further leaps in computing power and energy efficiency through technological innovation and product iteration, providing high energy efficiency, high integration, high performance, and high security edge AIoT chip products, and promoting the integrated application of AI technology in edge devices, contributing to the healthy and rapid development of the edge AI ecosystem.