Heterogeneous Quad-Core Embedded Processor RV32M1 Series – RI5CY Core Hardware Abstraction Layer Project
Luo Jia Submission: Heterogeneous Quad-Core Embedded Processor RV32M1 Series - RI5CY Core Hardware Abstraction Layer Project: https://github.com/rv32m1-rust/rv32m1_ri5cy-hal The RV32M1 processor has four cores with different instruction sets, including two different ARM cores and different RISC-V cores, allowing for more adaptable and flexible application frameworks. Each core should be supported by different hardware abstraction layer libraries; here our project provides support for the RI5CY core, with GPIO read/write and configuration already completed. Welcome to check it out.
