On ARMv7, we know that sp is R13, lr is R14, and PC is R15; on ARMV8, lr is x30, and sp and pc are no longer separate general-purpose registers. What is the reason for this design? 1. Why can’t sp and pc map to general-purpose registers? The reason for pc is to prevent users from arbitrarily modifying the pc pointer. Once separated, it cannot use mov pc, #temp to modify pc anymore. 2. Why does lr still map to a general-purpose register? lr is the link return register, which has its uniqueness. We can see that under this architecture, the assembly function translated from C language generally has statements like stp x29, x30, [sp,#-48] at the beginning of the function, which is intended to save x29 and x30, and x30 happens to be LR.
0000000000203e94 <image_verify>:
203e94: a9bd7bfd stp x29, x30, [sp,#-48]! // Save LR here
203e98: 910003fd mov x29, sp
203e9c: a9025bf5 stp x21, x22, [sp,#32]
203ea0: 2a0103f5 mov w21, w1
..... // It may jump to another function here, and LR's value will change
204074: a8c37bfd ldp x29, x30, [sp],#48 // Restore the previously saved value of LR before returning from this function
204078: d65f03c0 ret
In the ARM architecture, LR (Link Register) and ELR (Exception Link Register) are two important registers used to store the return address of functions and the return address for exception handling.
Link Register (LR)
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Basic Function:
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LR is used to save the return address of function calls. When a function is called, the CPU stores the address of the next instruction in LR so that it can return to the correct location after the function execution is complete.
Register Location:
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In the ARM architecture, LR is usually the R14 register. During exception handling, LR is also used to store the return address of the exception.
Usage Scenarios:
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LR is widely used in ordinary function calls and returns. The compiler automatically manages the use of LR when generating assembly code to ensure the correct return logic between function calls.
Exception Link Register (ELR)
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Basic Function:
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ELR is used to store the return address when an exception occurs. Each time the CPU enters exception handling mode (such as interrupts, faults, etc.), ELR records the instruction address that triggered the exception so that it can correctly return to the location where the exception occurred after handling the exception.
Register Location:
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The specific implementation of ELR depends on the exception level (EL), such as ELR_EL1, ELR_EL2, etc., corresponding to exception handling at different exception levels.
Usage Scenarios:
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During exception handling, the handler can read the ELR register to obtain the instruction address that triggered the exception and return to that address after completing the exception handling using the corresponding return instruction (such as ERET), restoring the execution of the program.
Summary
LR and ELR play a key role in the ARM architecture. LR is mainly used for the return of regular function calls, while ELR focuses on the return of exception handling. Together, they ensure the smoothness and correctness of the ARM system in both normal execution and exceptional circumstances. Understanding the functions and uses of these two registers is crucial for developing and debugging software on the ARM architecture.
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