The world’s first mass-produced RISC-V single-board computer with integrated 3D GPU – Fang·Starlight 2Recently, open-source RISC-V has come back into the spotlight. Not long ago, Tencent joined the RISC-V International Association, which is open to instruction set standards. Following Alibaba, Huawei, Unisoc, ZTE, SiFive, the Chinese Academy of Sciences, and other enterprises and institutions, RISC-V has welcomed a new Chinese member.
RISC-V is an open instruction set based on the principles of reduced instruction set computing, with the core advantage being that it is completely free and open, avoiding copyright disputes. More and more companies worldwide are excited about this emerging architecture, but for RISC-V to play a more important role in future products and applications—especially for Chinese companies looking to leverage it—there are still many “roadblocks” to clear.
Need to Cross the “Valley of Death” from Prototype to Product
Starting from a laboratory at the University of California, Berkeley, it has been more than ten years since the birth of RISC-V. This emerging instruction set architecture, often compared with X86 and Arm, is demonstrating its potential in more applications such as IoT and cloud computing, attracting numerous companies to get involved. In the summer of 2022, IP vendor Imagination launched the first commercial RISC-V core for system-on-chip (SoC) design; in February 2022, Intel officially joined the RISC-V International Association and invested 400 million euros to cooperate with the Spanish supercomputing center, planning to develop a RISC-V-based supercomputing CPU within ten years; Google plans to launch a new open-source operating system for RISC-V chips.
After the outbreak of the “patent war” with Arm, Qualcomm became more proactive in its RISC-V strategy. Qualcomm’s product management director Manju Varma stated that Qualcomm has developed many products based on RISC-V; by the end of 2022, the shipment of Qualcomm chips using RISC-V architecture had exceeded 650 million units. Currently, RISC-V microcontrollers are used in Qualcomm’s SoCs for PCs, mobile devices, wearables, connected cars, and AR/VR headsets. According to market research firm Semico Research, by 2027, there will be 25 billion AI SoCs based on RISC-V in the market, with expected revenues reaching 291 billion dollars that same year.
RISC-V entered the Chinese industry in 2017, with SiFive being one of the first domestic companies to engage in RISC-V development and has a deep understanding of it.
“By the end of 2022, there were approximately 50 different models of domestically produced RISC-V chips in mass production in China, with application scenarios concentrated in MCU, power management, wireless connectivity, storage control, IoT, and other mid-to-low-end scenarios,” said Zhou Jie, senior sales director at SiFive, to reporters from China Electronics News, indicating that the implementation of RISC-V technology in China has passed the initial stage. However, it is essential to recognize that RISC-V still faces two major “roadblocks” on its path to industrialization and commercialization in the country.
Zhou Jie believes that RISC-V will move toward open application scenarios, and establishing a mature software ecosystem will be the biggest challenge for RISC-V’s landing in open application scenarios. Currently, most mass-produced chips are used in relatively closed application scenarios where software demands are simple and fixed, allowing chip manufacturers to meet 70% of the software needs. In open application scenarios, software demands will grow exponentially, such as porting various operating systems, optimizing middleware and library functions, and adapting various development frameworks; each technical point is a massive project that requires collaboration among chip manufacturers, third-party software companies, and the open-source community to invest fully.
The second challenge is related to RISC-V’s penetration into high-performance application scenarios. Zhou Jie stated that mid-to-high-end RISC-V chips require extremely robust human and financial support from design solutions to successful tape-out, customized development, and large-scale production, ultimately achieving sales. For chip companies, it is crucial to build a complete end-to-end team with high-end chip design, R&D, and sales capabilities. However, there is a shortage of high-end chip talents in the country, and the competition for talent among chip companies is fierce, making team building very challenging. Additionally, start-up RISC-V chip companies need substantial funding to sustain R&D needs, and their development is not easy in the context of a cooling semiconductor investment environment.
In fact, all instruction sets must go through the “valley of death” from prototype to product. According to Tang Dan, assistant dean of the Beijing Open Source Chip Research Institute, this stage is sometimes not entirely a technical issue; the focus is still on market traction. Without market traction, relying solely on unilateral technological iteration is challenging in both technical and time cycles.
“The current difficulty in RISC-V industrialization lies in not finding a clear market entry point, which is the ‘killer application’ scenario,” Tang Dan told reporters from China Electronics News, citing Arm as an example. In the first few decades of the mobile ecosystem, Arm’s development was also relatively slow. Currently, RISC-V has widespread applications in IoT application scenarios with a short software ecosystem chain, especially in markets that require customization according to application scenarios. However, for an ecosystem to mature, it must rely on high-end ecosystem traction. For RISC-V to achieve reliable and high-quality commercial solutions, it needs to continuously improve the standards and specifications of the RISC-V instruction set while also identifying clear application scenarios to create opportunities for technological iteration.
The world’s first mass-produced high-performance multimedia RISC-V SoC chip platform – Fang·Jinghong 7110
High-performance RISC-V processors need to develop simultaneously with basic software
“Currently, the progress of software adaptation work for the RISC-V instruction set is very fast, which is directly related to the global software developers’ positive outlook on the open and free advantages of the RISC-V instruction set,” Tang Dan told reporters. Currently, the vast majority of core basic software has completed adaptation to the RISC-V instruction set. For example, since 2019, of the 16,268 Debian operating system software packages, 15,148 have completed adaptation to the RISC-V instruction set, with an adaptation rate exceeding 95%. RISC-V has become a Tier-1 architecture supported by Debian, second only to X86 and Arm.
Some believe that developing RISC-V towards high performance will face technical challenges from processor performance and software adaptation. In this regard, Tang Dan pointed out that processor performance and stability are not contradictory. On one hand, enhancing validation work in processor design can improve stability. On the other hand, processor stability must also be validated in the market to discover potential issues during use.
“High-performance RISC-V processors need to develop in sync with basic software to better adapt to the basic software. Introducing basic software testing and validation at different stages of processor development can help identify functional issues in processor design and also assess performance for targeted improvements,” Tang Dan said.
The software ecosystem is key to the implementation of RISC-V in high-performance applications. Zhou Jie believes that for high-performance chips to be implemented, they must be fully adapted to the RISC-V underlying framework, operating systems, middleware, key libraries, and application software. Currently, SiFive is actively promoting RISC-V’s adaptation with basic software by collaborating with open-source communities and third-party partners such as OpenHarmony, Fedora, OpenEuler, OpenSUSE, Ubuntu, Kylin, and Tongxin.
RISC-V has now entered the era of high-performance computing. In the high-performance computing field of RISC-V, several innovative companies plan to release server-level processors with similar 64 cores in 2023, marking the next exciting milestone for RISC-V.
However, the application of RISC-V in high-performance computing still faces some urgent issues to be resolved. According to Wang Junhui, co-founder and COO of Pengfeng Technology, the RISC-V system needs to build a mathematical computation library to support RISC-V’s application in high-performance computing, ensuring computational accuracy, efficiency, and source code-level security and controllability.
In the era of the digital economy driven by computing power, computing hardware exhibits diverse characteristics. Due to its openness, RISC-V’s ecosystem is richer and more diverse than X86 and Arm, which can lead to severe fragmentation issues. Therefore, Wang Junhui believes that RISC-V should return to a vertically integrated approach, contemplating how to proactively understand applications.
“From computing languages to compilers, to underlying mathematical computation libraries, and computer architecture, RISC-V must achieve vertical integration in multiple aspects. The existing market only offers raw price-performance competition; targeting the incremental market offers the possibility for leapfrog development,” Wang Junhui told reporters.
In the global heterogeneous computing field, Intel, Nvidia, and AMD form a mutually restraining “Three Kingdoms” pattern. Wang Junhui stated that the three leading international companies are each fighting their own battles with strong capital and strength, integrating CPU, GPU, and FPGA heterogeneous computing hardware platforms, laying out CUDA, OneAPI, and ROCm heterogeneous computing software stacks, attempting to form their own soft-hard integrated ecological systems, and engaging in both closed and open ecological competition. In this context, RISC-V must address the heterogeneous ecological issue while building a high-performance heterogeneous computing software stack and achieving soft-hard integration.
Building a Sustainable Ecosystem is the Core Challenge
From using open source to participating in open source, and then to contributing to open source or even partially leading it, China has made deeper and broader attempts in the RISC-V open-source field. Liao Xiangke, an academician of the Chinese Academy of Engineering, pointed out that open-source is a root technology innovation in software, especially an important way to develop foundational software such as operating systems. Fully utilizing open-source, collaborating with developers, communities, and upstream and downstream enterprises in the hardware and software industry chain to jointly develop and strengthen the domestic operating system industry is currently the most effective path.
“Chinese enterprises actively participate in the RISC-V International Association, indicating that everyone has seen the prospects of the RISC-V instruction set ecosystem, which will greatly benefit both China’s and the global RISC-V ecosystem,” Tang Dan told reporters. During the construction of the RISC-V instruction set ecosystem, similar to China’s participation in the 3GPP organization and 5G mobile communication, China should actively engage in the RISC-V International Association, promote, participate in, and even lead the formulation of relevant standards and specifications while also strengthening product R&D and promotion efforts. This will leverage China’s large population, market size, abundant engineers, and flexible industrial policies to actively apply and promote the RISC-V ecosystem in the market, accelerating the maturation process of the RISC-V industrial ecosystem.
Looking at RISC-V, due to its relatively short time of existence, the related compilers, development tools, software development environments, and other ecological elements are still actively being built in the domestic market. Furthermore, most of RISC-V’s early development took place abroad, making international collaboration crucial. To ensure RISC-V continues to develop positively, more ecosystem partners’ participation and cooperation are evidently needed, and how to build a sustainable ecosystem is a core challenge facing RISC-V.
Tang Dan believes that compilers, development tools, integrated development environments (IDE), and other ecological elements largely belong to foundational common technologies. In the process of improving the RISC-V ecosystem, China needs to sort out these foundational common technologies, organize cooperation and sharing among enterprises to jointly tackle these foundational common technologies, avoiding repetitive R&D by each company, which would waste R&D resources.
The domestic RISC-V compiler, development tools, IDE, and other ecological construction in the Chinese market cannot be separated from enterprises and talents willing to invest. However, it should be noted that there is currently a lack of related enterprises and talents.
Regarding the lack of willing investing enterprises, Zhou Jie further stated that it is challenging to create high-revenue, high-valuation companies in the RISC-V supporting ecological areas such as compilers, development tools, and IDEs, making it difficult to attract capital. The difficulty in financing has led many capable individuals to choose to continue working in international large companies rather than starting their own businesses. Furthermore, the awareness of respecting software copyrights in China needs to be improved. Additionally, since many open-source tools for RISC-V are available for direct use, some enterprises choose to use open-source tools directly or optimize based on open-source versions.
In response, Zhou Jie suggested that at the policy level, the government and relevant national institutions should quickly lead the push for the RISC-V open instruction set to become an industry standard and encourage domestic enterprises to participate in the discussion and formulation of standards and specifications. At the same time, continue to improve the legal environment to create a safer ground for intellectual property; at the ecosystem construction level, the state should guide and encourage industry-academia-research ecosystem cooperation, introducing specific support policies and measures to encourage and support RISC-V-related enterprises to participate in improving the open-source software ecosystem; at the capital level, the state can support relevant software ecosystem companies more and invest from a broader perspective.
Regarding talent cultivation in compilers, simulators, and other development tools, Zhou Jie hopes that more schools can offer foundational courses in related majors and introduce outstanding overseas educational resources.
Finally, Zhou Jie believes that the state should encourage pilot projects in the trust creation or education industry to procure products or solutions containing RISC-V chips to drive product iteration and development through application demands.
