Author: wcc149
Soft Core Processors
SOPC technology, or soft core processors, was first proposed by Altera. It is a design technology for SoC systems based on FPGAs. It is a soft core CPU system built using the logic and resources of an FPGA. Since the CPU is constructed using the general logic of the FPGA, it has a certain degree of flexibility. Users can customize the CPU according to their needs, adding specific functions such as division or floating-point units to enhance performance in certain specialized calculations, or removing functions that are not used in the system to save logic resources.
Additionally, various standard or custom peripherals can be added to the CPU based on actual user needs, such as standard interface peripherals like UART, SPI, and IIC. At the same time, users can also utilize FPGA logic resources to write various specialized peripherals and connect them to the CPU bus for control, enabling hardware-software collaboration while ensuring system performance and increasing system flexibility.
If a single soft core CPU cannot meet user demands, multiple soft core CPUs can be added to build a multi-core system, allowing for more flexible and convenient control capabilities through multi-core CPU collaboration.
Since it uses FPGA resources, it offers great flexibility, allowing for the implementation of various processors as needed, such as 8051, RISC-V, Xilinx MicroBlaze, and Altera Nios-II.
Hard Core Processors
Since soft core CPUs are built using the general logic resources of FPGAs, they tend to have a lower maximum real-time clock frequency compared to hard core processors, which are optimized through layout and routing. Additionally, they also consume more FPGA logic resources and on-chip memory. Therefore, SOPC solutions are only suitable for applications that do not require high overall performance from the processor, such as system initialization configuration, human-computer interaction, and coordination control among multiple functional modules.
As a result, major FPGA manufacturers have introduced SoC FPGA technology, which integrates hard core processors into the hardware circuit from the outset of chip design. This is a pure hardware implementation that does not consume FPGA logic resources. The hard core processor and FPGA logic are, to some extent, independent of each other. In simple terms, SoC FPGA combines an ARM processor and an FPGA chip into one chip.
For example, the well-known Xilinx ZYNQ/PYNQ series integrates an ARM Cortex-A9 processor, offering both programmability of ARM software and hardware programmability of FPGA, enabling important analysis and hardware acceleration while also highly integrating CPU, DSP, ASSP, and mixed-signal functions on a single device.
ZYNQ Development Board
Intel’s Cyclone V series, which integrates a dual-core Cortex-A9, was released in 2013. It is a new type of SoC chip that integrates a dual-core ARM Cortex-A9 processor and FPGA logic resources on a single chip. Compared to traditional single ARM processors or FPGA chips, it possesses the flexible and efficient data computation and transaction processing capabilities of ARM processors while also integrating the high-speed parallel processing advantages of FPGAs. Furthermore, based on the unique on-chip interconnect structure of both, the general logic resources on the FPGA can be configured to map to one or more peripherals with specific functions for the ARM processor, communicating via a high-speed AXI bus up to 128 bits wide to complete data and control command interactions. Since the on-chip ARM processor is hardwired logic optimized through layout, it can operate at a higher clock frequency, allowing for more instructions to be executed in a given time frame.
Differences and Relationships
From an architectural perspective, SOPC and SoC FPGA are unified, both consisting of FPGA and processor components. In SoC FPGA, a pure hardware-based hard core processor, referred to as HPS (Hardware Processor System), is embedded, while SOPC technology embeds a soft core processor implemented with FPGA logic resources. The instruction sets and processor performances of the two differ.
Generally speaking, hard core processors perform far better than soft core processors. In addition to the CPU part, hard core processors also integrate various high-performance peripherals, such as MMU, DDR3 controllers, and NAND FLASH controllers, enabling them to run mature Linux operating systems and applications, providing a unified system API and reducing the software development difficulty for developers. Although soft core CPUs can be configured to build corresponding controllers using logic resources to support specific functions, in terms of performance and development difficulty, designing and developing based on the SoC FPGA architecture is a better choice.
ZYNQ Internal Block Diagram
Furthermore, while SoC FPGA chips contain both ARM and FPGA, they are to some extent independent of each other. The ARM processor cores on the SoC chip are not included within the FPGA logic units; the FPGA and ARM (HPS) processors are simply packaged onto the same chip. The JTAG interface, power pins, and peripheral interface pins are all independent. Therefore, when designing with SoC FPGA chips, even if the on-chip ARM processor is not used, the chip resources occupied by the ARM processor cannot be released for use as general FPGA resources.
In contrast, SOPC uses general FPGA logic and memory resources to build the CPU, allowing the resources occupied by the CPU to be released and reused as general FPGA resources when the CPU is not in use.