Registers

Beginner’s Guide to Cortex-M3: Understanding Registers

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Beginner's Guide to Cortex-M3: Understanding Registers

Click the card below to follow Arm Technology Academy This article is selected from the “Arm Technology Blog” in the Extreme Technology column, written by Andy Lok, originally published on Zhihu. This article will introduce the concept and operation of registers by rewriting our Blinky program in detail. Original link: https://zhuanlan.zhihu.com/p/52855259 In this article, we … Read more

Key Concepts of Cortex-M3

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Key Concepts of Cortex-M3

Operating Modes Thread mode: This mode is active when the processor is reset or exits from an exception. The code in this mode can be either privileged or user code, controlled by CONTROL[0]. Handler mode: This mode is entered when an exception (including interrupts) occurs, and all code in this mode has privileged access. Code … Read more