ver0.1 Introduction In previous articles, we invested significant effort in introducing the hardware and software architecture of the ARM interrupt subsystem, laying the foundation for our further research into virtualization technology. Today, we will discuss a topic that requires a basic understanding of the interrupt subsystem. To fully grasp it, we recommend that everyone read … Read more
Click the blue text to follow us The workqueue is an important asynchronous execution mechanism in the Linux kernel, widely used in driver development, post-interrupt processing, and delayed processing scenarios. This article will systematically analyze this mechanism in terms of its usage, scheduling principles, and performance characteristics. 01 Introduction to Workqueues In kernel development, certain … Read more
In the embedded field, embedded real-time operating systems are becoming increasingly widely used. Using an embedded real-time operating system (RTOS) can more reasonably and effectively utilize CPU resources, simplify application software design, shorten system development time, and better ensure the system’s real-time performance and reliability. FreeRTOS is a mini real-time operating system kernel. As a … Read more
Transitioning from bare-metal (front-back architecture) software development to using a Real-Time Operating System (RTOS) can be a challenging task. However, there are many advantages to using an RTOS, such as simplifying application integration and supporting task preemption scheduling. This becomes meaningful when developers use complex 32-bit microcontrollers and have sufficient Flash and RAM space. Many … Read more
👩💻 [Unveiling the RTOS World] A Deep Dive into the Five States of Tasks, Enabling You to Master the Art of Embedded Scheduling! 👋 Have you ever wondered how smart devices like smartwatches, drones, and robotic vacuum cleaners manage various tasks in their “brains”? Today, we will explore the “Five Brothers of Task States” in … Read more
This article is a report by Associate Professor Wan Hai from Tsinghua University presented at the Fenglin Forum for reference.
1. Hardware Isolation of Nvidia MIG: From Architectural Design to Engineering Compromise MIG implements 7 independent instances in A100/H100, each exclusively occupying32-512 SM units, 1.8-24GB of VRAM, and independent L2 cache slices. Hardware-level isolation is achieved throughinstance ID tags: the instruction queue, register file, and memory controller access of each SM carry the instance ID, … Read more